ASRC has noise due to constant spawning of threads

[xross]

Seen at 3 kHz due to power spike during thread spawn.

The dynamic thread spawning scheme should be changed to only par on config change, not every buffer.

[ed-xmos]

@xross, Interesting - so do you mean that the core power rail is inducing EMI into the analog subsystem? Can you outline which board this is and quantify what noise level we are talking?

I am not sure how changing the par location would help. I measured power figures during part of the LP investigation and couldn't see a difference between a blocked thread and no thread at all. Whether a thread is waiting on an event to start processing, or being spawned and immediately starting processing, I think it will show the same core current profile when it starts hammering the VPU.

If we are looking to minimise power step changes I think we'd need to arbitrarily hold off some of the workers so that they slew the power steps. The only problem is that it will eat into the timing budget, but that could be acceptable in many cases.