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[core] debug
1 parent a9f0797 commit e875ca9

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2 files changed

+9
-5
lines changed

2 files changed

+9
-5
lines changed

vpr/src/route/rr_graph_generation/tileable_rr_graph/tileable_rr_graph_gsb.cpp

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1757,8 +1757,10 @@ void build_direct_connections_for_one_gsb(const RRGraphView& rr_graph,
17571757
/* Find the side of grid pins, the pin location should be unique!
17581758
* Pin location is required by searching a node in rr_graph
17591759
*/
1760-
std::vector<e_side> opin_grid_side = find_grid_pin_sides(grids, layer, from_grid_coordinate.x(), from_grid_coordinate.y(), opin);
1761-
VTR_ASSERT(1 == opin_grid_side.size());
1760+
std::vector<e_side> opin_grid_side = find_grid_pin_sides(grids, layer, from_grid_coordinate.x() + grid_type->pin_width_offset[opin], from_grid_coordinate.y() + grid_type->pin_height_offset[opin], opin);
1761+
if (1 != opin_grid_side.size()) {
1762+
VTR_ASSERT(1 == opin_grid_side.size());
1763+
}
17621764

17631765
/* directs[i].sub_tile_offset is added to from_capacity(z) to get the target_capacity */
17641766
int to_subtile_cap = z + directs[i].sub_tile_offset;
@@ -1775,8 +1777,10 @@ void build_direct_connections_for_one_gsb(const RRGraphView& rr_graph,
17751777
// If this block has capacity > 1 then the pins of z position > 0 are offset
17761778
// by the number of pins per capacity instance
17771779
int ipin = get_physical_pin_from_capacity_location(to_grid_type, relative_ipin, to_subtile_cap);
1778-
std::vector<e_side> ipin_grid_side = find_grid_pin_sides(grids, layer, to_grid_coordinate.x(), to_grid_coordinate.y(), ipin);
1779-
VTR_ASSERT(1 == ipin_grid_side.size());
1780+
std::vector<e_side> ipin_grid_side = find_grid_pin_sides(grids, layer, to_grid_coordinate.x() + to_grid_type->pin_width_offset[ipin], to_grid_coordinate.y() + to_grid_type->pin_height_offset[ipin], ipin);
1781+
if (1 != ipin_grid_side.size()) {
1782+
VTR_ASSERT(1 == ipin_grid_side.size());
1783+
}
17801784

17811785
RRNodeId opin_node_id = rr_graph.node_lookup().find_node(layer,
17821786
from_grid_coordinate.x() - from_grid_width_ofs,

vtr_flow/arch/timing/k6_frac_N10_tileable_4add_2chains_depop50_supertile_mem20K_22nm.xml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -149,7 +149,7 @@
149149
<fc in_type="frac" in_val="0.15" out_type="frac" out_val="0.10"/>
150150
<pinlocations pattern="custom">
151151
<loc side="top">mult_27.datain[72:73] mult_27.dataout[40:73]</loc>
152-
<loc side="right" yoffset="0">mult_27.datain[0:17] mult_27.dataout[0:9] mult_27.dataout</loc>
152+
<loc side="right" yoffset="0">mult_27.datain[0:17] mult_27.dataout[0:9]</loc>
153153
<loc side="right" yoffset="1">mult_27.datain[18:35] mult_27.dataout[10:19]</loc>
154154
<loc side="right" yoffset="2">mult_27.datain[36:53] mult_27.dataout[20:29]</loc>
155155
<loc side="right" yoffset="3">mult_27.datain[54:71] mult_27.dataout[30:39]</loc>

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