make format - solve warnings

Author: amin1377

libs/libvtrcapnproto/intra_cluster_serdes.h

@@ -17,6 +17,15 @@
 #include "router_lookahead_map_utils.h"
 
 
+void ToIntraClusterLookahead(std::unordered_map<t_physical_tile_type_ptr, util::t_ipin_primitive_sink_delays>& inter_tile_pin_primitive_pin_delay,
+                             std::unordered_map<t_physical_tile_type_ptr, std::unordered_map<int, util::Cost_Entry>>& tile_min_cost,
+                             const std::vector<t_physical_tile_type>& physical_tile_types,
+                             const VprIntraClusterLookahead::Reader& intra_cluster_lookahead_builder);
+
+void FromIntraClusterLookahead(VprIntraClusterLookahead::Builder& intra_cluster_lookahead_builder,
+                               const std::unordered_map<t_physical_tile_type_ptr, util::t_ipin_primitive_sink_delays>& inter_tile_pin_primitive_pin_delay,
+                               const std::unordered_map<t_physical_tile_type_ptr, std::unordered_map<int, util::Cost_Entry>>& tile_min_cost,
+                               const std::vector<t_physical_tile_type>& physical_tile_types);
 // Generic function to convert from Matrix capnproto message to vtr::NdMatrix.
 //
 // Template arguments:

vpr/src/base/stats.cpp

@@ -146,7 +146,7 @@ void length_and_bends_stats(const Netlist<>& net_list, bool is_flat) {
             total_segments += segments;
             max_segments = std::max(segments, max_segments);
 
-            if(is_absorbed) {
+            if (is_absorbed) {
                 num_absorbed_nets++;
             }
         } else if (net_list.net_is_ignored(net_id)) {
@@ -177,8 +177,6 @@ void length_and_bends_stats(const Netlist<>& net_list, bool is_flat) {
     VTR_LOG("\tTotal local nets with reserved CLB opins: %d\n", num_clb_opins_reserved);
 
     VTR_LOG("Total number of nets absorbed: %d\n", num_absorbed_nets);
-
-
 }
 
 ///@brief Determines how many tracks are used in each channel.

vpr/src/route/router_lookahead_map_utils.cpp

@@ -740,7 +740,6 @@ static void run_intra_tile_dijkstra(const RRGraphView& rr_graph,
         auto curr_type = rr_graph.node_type(curr.node);
         VTR_ASSERT(curr_type != t_rr_type::CHANX && curr_type != t_rr_type::CHANY);
         if (curr_type != SINK) {
-
             for (RREdgeId edge : rr_graph.edge_range(curr.node)) {
                 RRNodeId next_node = rr_graph.rr_nodes().edge_sink_node(edge);
                 auto cost_index = rr_graph.node_cost_index(next_node);

vpr/src/route/rr_graph.cpp

@@ -2203,7 +2203,7 @@ static void add_pins_rr_graph(RRGraphBuilder& rr_graph_builder,
 }
 
 static void connect_tile_src_sink_to_pins(RRGraphBuilder& rr_graph_builder,
-                                          std::map<int, t_arch_switch_inf>& arch_sw_inf_map,
+                                          std::map<int, t_arch_switch_inf>& /*arch_sw_inf_map*/,
                                           const std::vector<int>& class_num_vec,
                                           const int i,
                                           const int j,
@@ -2215,8 +2215,8 @@ static void connect_tile_src_sink_to_pins(RRGraphBuilder& rr_graph_builder,
         auto class_type = get_class_type_from_class_physical_num(physical_type_ptr, class_num);
         RRNodeId class_rr_node_id = get_class_rr_node_id(rr_graph_builder.node_lookup(), physical_type_ptr, i, j, class_num);
         VTR_ASSERT(class_rr_node_id != RRNodeId::INVALID());
-        bool is_primitive = is_primitive_pin(physical_type_ptr, pin_list[0]);
-        t_logical_block_type_ptr logical_block = is_primitive ? get_logical_block_from_pin_physical_num(physical_type_ptr, pin_list[0]) : nullptr;
+        //bool is_primitive = is_primitive_pin(physical_type_ptr, pin_list[0]);
+        //t_logical_block_type_ptr logical_block = is_primitive ? get_logical_block_from_pin_physical_num(physical_type_ptr, pin_list[0]) : nullptr;
         for (auto pin_num : pin_list) {
             RRNodeId pin_rr_node_id = get_pin_rr_node_id(rr_graph_builder.node_lookup(), physical_type_ptr, i, j, pin_num);
             if (pin_rr_node_id == RRNodeId::INVALID()) {
@@ -2228,17 +2228,17 @@ static void connect_tile_src_sink_to_pins(RRGraphBuilder& rr_graph_builder,
                 continue;
             }
             auto pin_type = get_pin_type_from_pin_physical_num(physical_type_ptr, pin_num);
-            int sw_id = -1;
-            if (is_primitive || pin_type == RECEIVER) {
-                VTR_ASSERT(logical_block != nullptr);
-                float primitive_comb_delay = get_pin_primitive_comb_delay(physical_type_ptr,
-                                                                          logical_block,
-                                                                          pin_num);
-                sw_id = find_create_intra_cluster_sw_arch_idx(arch_sw_inf_map,
-                                                              primitive_comb_delay);
-            } else {
-                sw_id = delayless_switch;
-            }
+            /*int sw_id = -1;
+             * if (is_primitive || pin_type == RECEIVER) {
+             * VTR_ASSERT(logical_block != nullptr);
+             * float primitive_comb_delay = get_pin_primitive_comb_delay(physical_type_ptr,
+             * logical_block,
+             * pin_num);
+             * sw_id = find_create_intra_cluster_sw_arch_idx(arch_sw_inf_map,
+             * primitive_comb_delay);
+             * } else {
+             * sw_id = delayless_switch;
+             * }*/
             if (class_type == DRIVER) {
                 VTR_ASSERT(pin_type == DRIVER);
                 rr_edges_to_create.emplace_back(class_rr_node_id, pin_rr_node_id, delayless_switch);