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8 | 8 |
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9 | 9 | /****************** Subroutine definitions *********************************/ |
10 | 10 |
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11 | | -void add_rr_graph_C_from_switches(float C_ipin_cblock) { |
| 11 | +void add_rr_graph_C_from_switches() { |
12 | 12 | /* This routine finishes loading the C elements of the rr_graph. It assumes * |
13 | 13 | * that when you call it the CHANX and CHANY nodes have had their C set to * |
14 | 14 | * their metal capacitance, and everything else has C set to 0. The graph * |
@@ -100,18 +100,19 @@ void add_rr_graph_C_from_switches(float C_ipin_cblock) { |
100 | 100 | } |
101 | 101 | /* End edge to CHANX or CHANY node. */ |
102 | 102 | else if (to_rr_type == e_rr_type::IPIN) { |
| 103 | + float ipin_c = rr_graph.rr_switch_inf(RRSwitchId(switch_index)).Cin; |
103 | 104 | if (INCLUDE_TRACK_BUFFERS) { |
104 | 105 | /* Implements sharing of the track to connection box buffer. |
105 | 106 | * Such a buffer exists at every segment of the wire at which |
106 | 107 | * at least one logic block input connects. */ |
107 | 108 | icblock = seg_index_of_cblock(rr_graph, from_rr_type, to_node); |
108 | 109 | if (cblock_counted[icblock] == false) { |
109 | | - rr_node_C[inode] += C_ipin_cblock; |
| 110 | + rr_node_C[inode] += ipin_c; |
110 | 111 | cblock_counted[icblock] = true; |
111 | 112 | } |
112 | 113 | } else { |
113 | 114 | /* No track buffer. Simply add the capacitance onto the wire */ |
114 | | - rr_node_C[inode] += C_ipin_cblock; |
| 115 | + rr_node_C[inode] += ipin_c; |
115 | 116 | } |
116 | 117 | } |
117 | 118 | } /* End loop over all edges of a node. */ |
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