Skip to content

Commit a08145e

Browse files
committed
light suite updated
1 parent 3eac9ef commit a08145e

File tree

52 files changed

+12779
-69442
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

52 files changed

+12779
-69442
lines changed

parmys/regression_test/benchmark/task/arch_sweep/synthesis_result.json

Lines changed: 16 additions & 284 deletions
Original file line numberDiff line numberDiff line change
@@ -490,135 +490,21 @@
490490
"AND": 0,
491491
"NOT": 0,
492492
"BUF": 0,
493-
"DLATCHSR_PPP": 0,
494-
"DLATCHSR_PPN": 0,
495-
"DLATCHSR_PNP": 0,
496-
"DLATCHSR_PNN": 0,
497-
"DLATCHSR_NPP": 0,
498-
"DLATCHSR_NPN": 0,
499-
"DLATCHSR_NNP": 0,
500-
"DLATCHSR_NNN": 0,
501-
"DLATCH_PP1": 0,
502-
"DLATCH_PP0": 0,
503-
"DLATCH_PN1": 0,
504-
"DLATCH_PN0": 0,
505-
"DLATCH_NP1": 0,
506-
"DLATCH_NP0": 0,
507-
"DLATCH_NN1": 0,
508-
"DLATCH_NN0": 0,
509-
"DLATCH_P": 0,
510-
"DLATCH_N": 0,
511-
"SDFFCE_PP1P": 0,
512-
"SDFFCE_PP1N": 0,
513-
"SDFFCE_PP0P": 0,
514-
"SDFFCE_PP0N": 0,
515-
"SDFFCE_PN1P": 0,
516-
"SDFFCE_PN1N": 0,
517-
"SDFFCE_PN0P": 0,
518-
"SDFFCE_PN0N": 0,
519-
"SDFFCE_NP1P": 0,
520-
"SDFFCE_NP1N": 0,
521-
"SDFFCE_NP0P": 0,
522-
"SDFFCE_NP0N": 0,
523-
"SDFFCE_NN1P": 0,
524-
"SDFFCE_NN1N": 0,
525-
"SDFFCE_NN0P": 0,
526-
"SDFFCE_NN0N": 0,
527-
"SDFFE_PP1P": 0,
528-
"SDFFE_PP1N": 0,
529-
"SDFFE_PP0P": 0,
530-
"SDFFE_PP0N": 0,
531-
"SDFFE_PN1P": 0,
532-
"SDFFE_PN1N": 0,
533-
"SDFFE_PN0P": 0,
534-
"SDFFE_PN0N": 0,
535-
"SDFFE_NP1P": 0,
536-
"SDFFE_NP1N": 0,
537-
"SDFFE_NP0P": 0,
538-
"SDFFE_NP0N": 0,
539-
"SDFFE_NN1P": 0,
540-
"SDFFE_NN1N": 0,
541-
"SDFFE_NN0P": 0,
542-
"SDFFE_NN0N": 0,
543-
"SDFF_PP1": 0,
544-
"SDFF_PP0": 0,
545-
"SDFF_PN1": 0,
546-
"SDFF_PN0": 0,
547-
"SDFF_NP1": 0,
548-
"SDFF_NP0": 0,
549-
"SDFF_NN1": 0,
550-
"SDFF_NN0": 0,
551-
"DFFSRE_PPPP": 0,
552-
"DFFSRE_PPPN": 0,
553-
"DFFSRE_PPNP": 0,
554-
"DFFSRE_PPNN": 0,
555-
"DFFSRE_PNPP": 0,
556-
"DFFSRE_PNPN": 0,
557-
"DFFSRE_PNNP": 0,
558-
"DFFSRE_PNNN": 0,
559-
"DFFSRE_NPPP": 0,
560-
"DFFSRE_NPPN": 0,
561-
"DFFSRE_NPNP": 0,
562-
"DFFSRE_NPNN": 0,
563-
"DFFSRE_NNPP": 0,
564-
"DFFSRE_NNPN": 0,
565-
"DFFSRE_NNNP": 0,
566-
"DFFSRE_NNNN": 0,
567-
"DFFSR_PPP": 0,
568-
"DFFSR_PPN": 0,
569-
"DFFSR_PNP": 0,
570-
"DFFSR_PNN": 0,
571-
"DFFSR_NPP": 0,
572-
"DFFSR_NPN": 0,
573-
"DFFSR_NNP": 0,
574-
"DFFSR_NNN": 0,
575-
"ALDFFE_PPP": 0,
576-
"ALDFFE_PPN": 0,
577-
"ALDFFE_PNP": 0,
578-
"ALDFFE_PNN": 0,
579-
"ALDFFE_NPP": 0,
580-
"ALDFFE_NPN": 0,
581-
"ALDFFE_NNP": 0,
582-
"ALDFFE_NNN": 0,
583-
"ALDFF_PP": 0,
584-
"ALDFF_PN": 0,
585-
"ALDFF_NP": 0,
586-
"ALDFF_NN": 0,
587-
"DFFE_PP1P": 0,
588-
"DFFE_PP1N": 0,
589-
"DFFE_PP0P": 0,
590-
"DFFE_PP0N": 0,
591-
"DFFE_PN1P": 0,
592-
"DFFE_PN1N": 0,
593-
"DFFE_PN0P": 0,
594-
"DFFE_PN0N": 0,
595-
"DFFE_NP1P": 0,
596-
"DFFE_NP1N": 0,
597-
"DFFE_NP0P": 0,
598-
"DFFE_NP0N": 0,
599-
"DFFE_NN1P": 0,
600-
"DFFE_NN1N": 0,
601-
"DFFE_NN0P": 0,
602-
"DFFE_NN0N": 0,
603-
"DFF_PP1": 0,
604-
"DFF_PP0": 0,
605-
"DFF_PN1": 0,
606-
"DFF_PN0": 0,
607-
"DFF_NP1": 0,
608-
"DFF_NP0": 0,
609-
"DFF_NN1": 0,
610-
"DFF_NN0": 0,
611-
"DFFE_PP": 0,
612-
"DFFE_PN": 0,
613-
"DFFE_NP": 0,
614-
"DFFE_NN": 0,
615-
"DFF_P": 0,
616-
"DFF_N": 0,
617-
"FF": 0,
618-
"SR_PP": 0,
619-
"SR_PN": 0,
620-
"SR_NP": 0,
621-
"SR_NN": 0,
493+
"SR latches": [],
494+
"FFs": [],
495+
"DFFs": [],
496+
"FFs with enable": [],
497+
"FFs with reset": [],
498+
"FFs with asynchronous reset and enable": [],
499+
"FFs with asynchronous load": [],
500+
"FFs with asynchronous load and enable": [],
501+
"FFs with set and reset": [],
502+
"FFs with asynchronous set and reset and enable": [],
503+
"FFs with synchronous reset": [],
504+
"FFs with synchronous reset and enable": [],
505+
"D latches": [],
506+
"D latches with reset": [],
507+
"D latches with set and reset": [],
622508
"adder": 0,
623509
"addition_fp_16": 0,
624510
"addition_fp_32": 0,
@@ -686,161 +572,7 @@
686572
"scff": 0,
687573
"single_port_ram": 0,
688574
"xadder": 0,
689-
"mult_1_1_2": 0,
690-
"mult_1_2_3": 0,
691-
"mult_1_3_4": 0,
692-
"mult_2_1_3": 0,
693-
"mult_2_2_4": 0,
694-
"mult_2_3_5": 0,
695-
"mult_2_4_6": 0,
696-
"mult_3_1_4": 0,
697-
"mult_3_2_5": 0,
698-
"mult_3_3_6": 0,
699-
"mult_3_4_7": 0,
700-
"mult_3_5_8": 0,
701-
"mult_4_2_6": 0,
702-
"mult_4_3_7": 0,
703-
"mult_4_4_8": 0,
704-
"mult_4_5_9": 0,
705-
"mult_4_6_10": 0,
706-
"mult_5_3_8": 0,
707-
"mult_5_4_9": 0,
708-
"mult_5_5_10": 0,
709-
"mult_5_6_11": 0,
710-
"mult_5_7_12": 0,
711-
"mult_6_4_10": 0,
712-
"mult_6_5_11": 0,
713-
"mult_6_6_12": 0,
714-
"mult_6_7_13": 0,
715-
"mult_6_8_14": 0,
716-
"mult_7_5_12": 0,
717-
"mult_7_6_13": 0,
718-
"mult_7_7_14": 0,
719-
"mult_7_8_15": 0,
720-
"mult_7_9_16": 0,
721-
"mult_8_6_14": 0,
722-
"mult_8_7_15": 0,
723-
"mult_8_8_16": 0,
724-
"mult_8_9_17": 0,
725-
"mult_8_10_18": 0,
726-
"mult_9_7_16": 0,
727-
"mult_9_8_17": 0,
728-
"mult_9_9_18": 0,
729-
"mult_9_10_19": 0,
730-
"mult_9_11_20": 0,
731-
"mult_10_8_18": 0,
732-
"mult_10_9_19": 0,
733-
"mult_10_10_20": 0,
734-
"mult_10_11_21": 0,
735-
"mult_10_12_22": 0,
736-
"mult_11_9_20": 0,
737-
"mult_11_10_21": 0,
738-
"mult_11_11_22": 0,
739-
"mult_11_12_23": 0,
740-
"mult_11_13_24": 0,
741-
"mult_12_10_22": 0,
742-
"mult_12_11_23": 0,
743-
"mult_12_12_24": 0,
744-
"mult_12_13_25": 0,
745-
"mult_12_14_26": 0,
746-
"mult_13_11_24": 0,
747-
"mult_13_12_25": 0,
748-
"mult_13_13_26": 0,
749-
"mult_13_14_27": 0,
750-
"mult_13_15_28": 0,
751-
"mult_14_12_26": 0,
752-
"mult_14_13_27": 0,
753-
"mult_14_14_28": 0,
754-
"mult_14_15_29": 0,
755-
"mult_14_16_30": 0,
756-
"mult_15_13_28": 0,
757-
"mult_15_14_29": 0,
758-
"mult_15_15_30": 0,
759-
"mult_15_16_31": 0,
760-
"mult_15_17_32": 0,
761-
"mult_16_14_30": 0,
762-
"mult_16_15_31": 0,
763-
"mult_16_16_32": 0,
764-
"mult_16_17_33": 0,
765-
"mult_16_18_34": 0,
766-
"mult_17_15_32": 0,
767-
"mult_17_16_33": 0,
768-
"mult_17_17_34": 0,
769-
"mult_17_18_35": 0,
770-
"mult_17_19_36": 0,
771-
"mult_18_16_34": 0,
772-
"mult_18_17_35": 0,
773-
"mult_18_18_36": 0,
774-
"mult_18_19_37": 0,
775-
"mult_18_20_38": 0,
776-
"mult_19_17_36": 0,
777-
"mult_19_18_37": 0,
778-
"mult_19_19_38": 0,
779-
"mult_19_20_39": 0,
780-
"mult_19_21_40": 0,
781-
"mult_20_18_38": 0,
782-
"mult_20_19_39": 0,
783-
"mult_20_20_40": 0,
784-
"mult_20_21_41": 0,
785-
"mult_20_22_42": 0,
786-
"mult_21_19_40": 0,
787-
"mult_21_20_41": 0,
788-
"mult_21_21_42": 0,
789-
"mult_21_22_43": 0,
790-
"mult_21_23_44": 0,
791-
"mult_22_20_42": 0,
792-
"mult_22_21_43": 0,
793-
"mult_22_22_44": 0,
794-
"mult_22_23_45": 0,
795-
"mult_22_24_46": 0,
796-
"mult_23_21_44": 0,
797-
"mult_23_22_45": 0,
798-
"mult_23_23_46": 0,
799-
"mult_23_24_47": 0,
800-
"mult_23_25_48": 0,
801-
"mult_24_22_46": 0,
802-
"mult_24_23_47": 0,
803-
"mult_24_24_48": 0,
804-
"mult_24_25_49": 0,
805-
"mult_24_26_50": 0,
806-
"mult_25_23_48": 0,
807-
"mult_25_24_49": 0,
808-
"mult_25_25_50": 0,
809-
"mult_25_26_51": 0,
810-
"mult_25_27_52": 0,
811-
"mult_26_24_50": 0,
812-
"mult_26_25_51": 0,
813-
"mult_26_26_52": 0,
814-
"mult_26_27_53": 0,
815-
"mult_26_28_54": 0,
816-
"mult_27_25_52": 0,
817-
"mult_27_26_53": 0,
818-
"mult_27_27_54": 0,
819-
"mult_27_28_55": 0,
820-
"mult_27_29_56": 0,
821-
"mult_28_26_54": 0,
822-
"mult_28_27_55": 0,
823-
"mult_28_28_56": 0,
824-
"mult_28_29_57": 0,
825-
"mult_28_30_58": 0,
826-
"mult_29_27_56": 0,
827-
"mult_29_28_57": 0,
828-
"mult_29_29_58": 0,
829-
"mult_29_30_59": 0,
830-
"mult_29_31_60": 0,
831-
"mult_30_28_58": 0,
832-
"mult_30_29_59": 0,
833-
"mult_30_30_60": 0,
834-
"mult_30_31_61": 0,
835-
"mult_30_32_62": 0,
836-
"mult_31_29_60": 0,
837-
"mult_31_30_61": 0,
838-
"mult_31_31_62": 0,
839-
"mult_31_32_63": 0,
840-
"mult_31_33_64": 0,
841-
"mult_32_30_62": 0,
842-
"mult_32_31_63": 0,
843-
"mult_32_32_64": 0,
575+
"mult_x_y_z": [],
844576
"anyinit": 0,
845577
"fsm": 0,
846578
"mem_v2": 0,

0 commit comments

Comments
 (0)