make format

soheilshahrouz · soheilshahrouz · commit 903ecce7926a · 2025-09-04T18:01:23.000-04:00
diff --git a/libs/libarchfpga/src/device_grid.h b/libs/libarchfpga/src/device_grid.h
@@ -93,7 +93,6 @@ class DeviceGrid {
         return root_loc;
     }
 
-
     ///@brief Returns a rectangle which represents the bounding box of the tile at the given location.
     inline vtr::Rect<int> get_tile_bb(const t_physical_tile_loc& tile_loc) const {
         t_physical_tile_type_ptr tile_type = get_physical_type(tile_loc);
@@ -108,7 +107,7 @@ class DeviceGrid {
 
     // Forward const-iterator over (layer, x, y)
     class loc_const_iterator {
-    public:
+      public:
         using value_type = t_physical_tile_loc;
         using difference_type = std::ptrdiff_t;
         using iterator_category = std::forward_iterator_tag;
@@ -139,26 +138,25 @@ class DeviceGrid {
 
         bool operator==(const loc_const_iterator& o) const {
             return g_ == o.g_
-                && loc_.layer_num == o.loc_.layer_num
-                && loc_.x == o.loc_.x
-                && loc_.y == o.loc_.y;
+                   && loc_.layer_num == o.loc_.layer_num
+                   && loc_.x == o.loc_.x
+                   && loc_.y == o.loc_.y;
         }
         bool operator!=(const loc_const_iterator& o) const { return !(*this == o); }
 
-    private:
+      private:
         const DeviceGrid* g_ = nullptr;
         t_physical_tile_loc loc_{0, 0, 0};
     };
 
     /// Iterate every (layer, x, y) location
     inline auto all_locations() const {
         return vtr::make_range(
-            loc_const_iterator(this, /*layer*/0, /*x*/0, /*y*/0),
-            loc_const_iterator(this, /*layer*/get_num_layers(), /*x*/0, /*y*/0) // end sentinel
+            loc_const_iterator(this, /*layer*/ 0, /*x*/ 0, /*y*/ 0),
+            loc_const_iterator(this, /*layer*/ get_num_layers(), /*x*/ 0, /*y*/ 0) // end sentinel
         );
     }
 
-
     ///@brief Return the metadata of the tile at the specified location
     inline const t_metadata_dict* get_metadata(const t_physical_tile_loc& tile_loc) const {
         return grid_[tile_loc.layer_num][tile_loc.x][tile_loc.y].meta;
diff --git a/libs/libvtrutil/src/vtr_math.h b/libs/libvtrutil/src/vtr_math.h
@@ -83,7 +83,7 @@ ResultTy median(Container c) {
 ///@brief Returns the median of a whole container, assuming that it is already
 ///       sorted.
 template<typename ResultTy = double, typename Container>
-ResultTy median_presorted(const Container &c) {
+ResultTy median_presorted(const Container& c) {
     return median_presorted<ResultTy>(std::begin(c), std::end(c));
 }
 
@@ -116,7 +116,7 @@ double geomean(const InputIterator first, const InputIterator last, double init
 
 ///@brief Returns the geometric mean of a whole container
 template<typename Container>
-double geomean(const Container &c) {
+double geomean(const Container& c) {
     return geomean(std::begin(c), std::end(c));
 }
 
@@ -139,7 +139,7 @@ double arithmean(const InputIterator first, const InputIterator last, double ini
 
 ///@brief Returns the aritmatic mean of a whole container
 template<typename Container>
-double arithmean(const Container &c) {
+double arithmean(const Container& c) {
     return arithmean(std::begin(c), std::end(c));
 }
 
diff --git a/vpr/src/analytical_place/analytical_placement_flow.cpp b/vpr/src/analytical_place/analytical_placement_flow.cpp
@@ -111,9 +111,9 @@ static void convert_flat_to_partial_placement(const FlatPlacementInfo& flat_plac
             } else {
                 if (current_loc_x != -1 && current_loc_y != -1) {
                     atom_loc_x = std::clamp(current_loc_x, 0.0f,
-                                            static_cast<float>(g_vpr_ctx.device().grid.width() -1));
+                                            static_cast<float>(g_vpr_ctx.device().grid.width() - 1));
                     atom_loc_y = std::clamp(current_loc_y, 0.0f,
-                                            static_cast<float>(g_vpr_ctx.device().grid.height() -1));
+                                            static_cast<float>(g_vpr_ctx.device().grid.height() - 1));
                     // If current_loc_layer or current_loc_sub_tile are unset (-1), default to layer 0 and sub_tile 0.
                     if (current_loc_layer == -1)
                         current_loc_layer = 0;
@@ -155,7 +155,7 @@ static void convert_flat_to_partial_placement(const FlatPlacementInfo& flat_plac
         }
     }
     VTR_LOG("%zu of %zu molecules placed at device center (no atoms of these molecules found in flat placement).\n",
-        num_mols_assigned_to_center, ap_netlist.blocks().size());
+            num_mols_assigned_to_center, ap_netlist.blocks().size());
 }
 
 /**
diff --git a/vpr/src/analytical_place/full_legalizer.cpp b/vpr/src/analytical_place/full_legalizer.cpp
diff --git a/vpr/src/base/load_flat_place.cpp b/vpr/src/base/load_flat_place.cpp
@@ -259,7 +259,7 @@ void log_flat_placement_reconstruction_info(
         VTR_ASSERT(flat_placement_info.blk_layer[atom_blk_id] != FlatPlacementInfo::UNDEFINED_POS);
         VTR_ASSERT(flat_placement_info.blk_sub_tile[atom_blk_id] != FlatPlacementInfo::UNDEFINED_SUB_TILE);
 
-         // Get the (x, y, layer) position of the block.
+        // Get the (x, y, layer) position of the block.
         float blk_x = flat_placement_info.blk_x_pos[atom_blk_id];
         float blk_y = flat_placement_info.blk_y_pos[atom_blk_id];
         float blk_layer = flat_placement_info.blk_layer[atom_blk_id];
diff --git a/vpr/src/base/netlist_writer.cpp b/vpr/src/base/netlist_writer.cpp
@@ -177,9 +177,9 @@ typedef std::pair<DelayTriple, std::string> sequential_port_delay_pair;
  * @brief Information needed to describe a delay on a port in an SDF file.
  */
 struct PortDelay {
-    std::string port_name;          ///<The name of the port to annotate with delay.
-    int ipin;                       ///<The pin in the port to annotate (if a multi-pin port).
-    DelayTriple port_delay_triple;  ///<The delay triple to annotate.
+    std::string port_name;         ///<The name of the port to annotate with delay.
+    int ipin;                      ///<The pin in the port to annotate (if a multi-pin port).
+    DelayTriple port_delay_triple; ///<The delay triple to annotate.
 };
 
 /*enum class PortType {
@@ -1981,7 +1981,6 @@ class NetlistWriterVisitor : public NetlistVisitor {
 
                                 ipin_port_delay_triple = new_port_delay_time;
                             }
-
                         }
                     }
 
@@ -2007,7 +2006,6 @@ class NetlistWriterVisitor : public NetlistVisitor {
                                                              atom_netlist.pin_port_bit(clk_pin_id),
                                                              DelayTriple(thld, thld, thld));
                             }
-
                         }
                     }
 
@@ -2116,7 +2114,6 @@ class NetlistWriterVisitor : public NetlistVisitor {
                                                         port->name,
                                                         ipin,
                                                         total_cq_delay_triple);
-
                         }
                     }
                 }
diff --git a/vpr/src/base/setup_grid.cpp b/vpr/src/base/setup_grid.cpp
@@ -704,12 +704,12 @@ static void check_grid(const DeviceGrid& grid) {
             VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Grid Location (%d,%d,%d) has invalid width offset (%d).\n",
                             tile_loc.layer_num, tile_loc.x, tile_loc.y,
                             width_offset);
-            }
+        }
         if ((grid.get_height_offset(tile_loc) < 0) || (grid.get_height_offset(tile_loc) >= type->height)) {
             VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Grid Location (%d,%d,%d) has invalid height offset (%d).\n",
                             tile_loc.layer_num, tile_loc.x, tile_loc.y,
                             height_offset);
-            }
+        }
 
         // Verify that type and width/height offsets are correct (e.g. for dimension > 1 blocks)
         if (grid.get_width_offset(tile_loc) == 0 && grid.get_height_offset(tile_loc) == 0) {
diff --git a/vpr/src/base/stats.cpp b/vpr/src/base/stats.cpp
@@ -96,7 +96,7 @@ void routing_stats(const Netlist<>& net_list,
             } else {
                 area += type->area;
             }
-    }
+        }
     }
     /* Todo: need to add pitch of routing to blocks with height > 3 */
     VTR_LOG("\tTotal logic block area (Warning, need to add pitch of routing to blocks with height > 3): %g\n", area);
diff --git a/vpr/src/base/vpr_types.h b/vpr/src/base/vpr_types.h
@@ -342,7 +342,7 @@ class t_pb {
 ///@brief Representation of intra-logic block routing
 struct t_pb_route {
     AtomNetId atom_net_id;                        ///<which net in the atom netlist uses this pin
-    int driver_pb_pin_id = UNDEFINED;                  ///<The pb_pin id of the pb_pin that drives this pin
+    int driver_pb_pin_id = UNDEFINED;             ///<The pb_pin id of the pb_pin that drives this pin
     std::vector<int> sink_pb_pin_ids;             ///<The pb_pin id's of the pb_pins driven by this node
     const t_pb_graph_pin* pb_graph_pin = nullptr; ///<The graph pin associated with this node
 };
diff --git a/vpr/src/draw/draw.cpp b/vpr/src/draw/draw.cpp
@@ -299,7 +299,7 @@ void update_screen(ScreenUpdatePriority priority, const char* msg, enum pic_type
     /* If it's the type of picture displayed has changed, set up the proper  *
      * buttons.                                                              */
     if (draw_state->pic_on_screen != pic_on_screen_val) { //State changed
-        
+
         state_change = true;
 
         if (draw_state->pic_on_screen == NO_PICTURE) {
@@ -312,7 +312,6 @@ void update_screen(ScreenUpdatePriority priority, const char* msg, enum pic_type
         draw_state->pic_on_screen = pic_on_screen_val;
     }
 
-    
     bool should_pause = int(priority) >= draw_state->gr_automode;
 
     //If there was a state change, we must call ezgl::application::run() to update the buttons.
@@ -1150,7 +1149,7 @@ static void run_graphics_commands(const std::string& commands) {
                            "Expect show critical path delay (bool), show critical path flylines (bool), and show critical path routing (bool) after 'set_cpd'");
             draw_state->show_crit_path = true;
             draw_state->show_crit_path_flylines = true;
-            draw_state->show_crit_path_delays= (bool)vtr::atoi(cmd[1]);
+            draw_state->show_crit_path_delays = (bool)vtr::atoi(cmd[1]);
             VTR_LOG("%d\n", (int)draw_state->show_crit_path);
         } else if (cmd[0] == "set_routing_util") {
             VTR_ASSERT_MSG(cmd.size() == 2,
diff --git a/vpr/src/draw/draw_basic.cpp b/vpr/src/draw/draw_basic.cpp
@@ -976,9 +976,9 @@ void draw_crit_path(ezgl::renderer* g) {
                     g->set_line_dash(ezgl::line_dash::none);
                     g->set_line_width(0);
                 }
-            } 
-            
-            if(draw_state->show_crit_path_routing) {
+            }
+
+            if (draw_state->show_crit_path_routing) {
                 //Draw the routed version of the timing edge
                 draw_routed_timing_edge_connection(prev_node, node, color, g);
             }
diff --git a/vpr/src/draw/draw_toggle_functions.cpp b/vpr/src/draw/draw_toggle_functions.cpp
@@ -301,18 +301,16 @@ void placement_macros_cbk(GtkComboBoxText* self, ezgl::application* app) {
     app->refresh_drawing();
 }
 
-
 void toggle_crit_path_cbk(GtkSwitch*, gboolean state, ezgl::application* app) {
 
-
     t_draw_state* draw_state = get_draw_state_vars();
 
     draw_state->show_crit_path = state;
 
     gtk_widget_set_sensitive(GTK_WIDGET(app->get_object("ToggleCritPathFlylines")), state);
     gtk_widget_set_sensitive(GTK_WIDGET(app->get_object("ToggleCritPathDelays")), state);
 
-    if(draw_state->setup_timing_info && draw_state->pic_on_screen == ROUTING) {
+    if (draw_state->setup_timing_info && draw_state->pic_on_screen == ROUTING) {
         gtk_widget_set_sensitive(GTK_WIDGET(app->get_object("ToggleCritPathRouting")), state);
     }
 
diff --git a/vpr/src/draw/draw_toggle_functions.h b/vpr/src/draw/draw_toggle_functions.h
@@ -98,7 +98,6 @@ void toggle_router_util_cbk(GtkComboBoxText* self, ezgl::application* app);
  */
 void toggle_crit_path_cbk(GtkSwitch*, gboolean state, ezgl::application* app);
 
-
 /* Callback function for main.ui created toggle_router_expansion_costs in ui_setup.cpp.
  * Draws different router expansion costs based on user input. Changes value of draw_state->show_router_expansion_cost. */
 void toggle_expansion_cost_cbk(GtkComboBoxText* self, ezgl::application* app);
diff --git a/vpr/src/draw/draw_types.h b/vpr/src/draw/draw_types.h
@@ -32,7 +32,6 @@
 #include "ezgl/color.hpp"
 #include "ezgl/application.hpp"
 
-
 /// @brief Whether to draw routed nets or flylines (direct lines between sources and sinks).
 enum e_draw_nets {
     DRAW_ROUTED_NETS,
diff --git a/vpr/src/draw/search_bar.cpp b/vpr/src/draw/search_bar.cpp
@@ -236,8 +236,6 @@ bool highlight_rr_nodes(RRNodeId hit_node) {
         VTR_LOG("%s\n", describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, node, draw_state->is_flat).c_str());
     }
 
-    
-
     //Show info about *only* hit node to graphics
     std::string info = describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, hit_node, draw_state->is_flat);
     sprintf(message, "Selected %s", info.c_str());
diff --git a/vpr/src/draw/ui_setup.cpp b/vpr/src/draw/ui_setup.cpp
@@ -255,7 +255,7 @@ void crit_path_button_setup(ezgl::application* app) {
 
     t_draw_state* draw_state = get_draw_state_vars();
 
-     //Toggle Critical Path
+    //Toggle Critical Path
     GtkSwitch* toggle_nets_switch = GTK_SWITCH(app->get_object("ToggleCritPath"));
     g_signal_connect(toggle_nets_switch, "state-set", G_CALLBACK(toggle_crit_path_cbk), app);
 
diff --git a/vpr/src/pack/greedy_candidate_selector.cpp b/vpr/src/pack/greedy_candidate_selector.cpp
@@ -1271,7 +1271,7 @@ PackMoleculeId GreedyCandidateSelector::get_unrelated_candidate_for_cluster_appa
     vtr::NdMatrix<bool, 3> visited({flat_grid_num_layers,
                                     flat_grid_width,
                                     flat_grid_height},
-                                    false);
+                                   false);
 
     t_physical_tile_loc cluster_tile_loc(cluster_gain_stats.flat_cluster_position.x,
                                          cluster_gain_stats.flat_cluster_position.y,
diff --git a/vpr/src/place/place_util.cpp b/vpr/src/place/place_util.cpp
@@ -142,7 +142,7 @@ void alloc_and_load_legal_placement_locations(std::vector<std::vector<std::vecto
                 if (device_ctx.grid.is_root_location(tile_loc)) {
                     int itype = tile->index;
                     int isub_tile = sub_tile.index;
-                    t_pl_loc temp_loc {tile_loc, k + capacity.low};
+                    t_pl_loc temp_loc{tile_loc, k + capacity.low};
                     legal_pos[itype][isub_tile].push_back(temp_loc);
                 }
             }
diff --git a/vpr/src/power/power.cpp b/vpr/src/power/power.cpp
@@ -606,7 +606,7 @@ static void power_usage_blocks(t_power_usage* power_usage) {
     t_logical_block_type_ptr logical_block;
 
     // Loop through all grid locations
-    for (const t_physical_tile_loc tile_loc :  device_ctx.grid.all_locations()) {
+    for (const t_physical_tile_loc tile_loc : device_ctx.grid.all_locations()) {
         t_physical_tile_type_ptr physical_tile = device_ctx.grid.get_physical_type(tile_loc);
         int width_offset = device_ctx.grid.get_width_offset(tile_loc);
         int height_offset = device_ctx.grid.get_height_offset(tile_loc);
diff --git a/vpr/src/route/edge_groups.h b/vpr/src/route/edge_groups.h
@@ -43,7 +43,7 @@ class EdgeGroups {
   private:
     struct node_data {
         std::unordered_set<RRNodeId> edges; // Set of indices into graph_
-        int set = UNDEFINED;                     // Index into rr_non_config_node_sets_
+        int set = UNDEFINED;                // Index into rr_non_config_node_sets_
     };
 
     // Perform a DFS traversal marking everything reachable with the same set id
diff --git a/vpr/src/route/router_lookahead/router_lookahead_extended_map.h b/vpr/src/route/router_lookahead/router_lookahead_extended_map.h
@@ -10,7 +10,8 @@
 class ExtendedMapLookahead : public RouterLookahead {
   public:
     ExtendedMapLookahead(bool is_flat, int route_verbosity)
-        : is_flat_(is_flat), route_verbosity_(route_verbosity) {}
+        : is_flat_(is_flat)
+        , route_verbosity_(route_verbosity) {}
 
   private:
     bool is_flat_;
diff --git a/vpr/src/route/rr_graph_generation/rr_graph.cpp b/vpr/src/route/rr_graph_generation/rr_graph.cpp
@@ -394,7 +394,6 @@ static void build_cluster_internal_edges(RRGraphBuilder& rr_graph_builder,
                                          bool is_flat,
                                          bool load_rr_graph);
 
-
 /// @brief Connect the pins of the given t_pb to their drivers - It doesn't add the edges going in/out of pins on a chain
 static void add_pb_edges(RRGraphBuilder& rr_graph_builder,
                          t_rr_edge_info_set& rr_edges_to_create,
@@ -831,7 +830,7 @@ static void add_intra_cluster_edges_rr_graph(RRGraphBuilder& rr_graph_builder,
     int num_collapsed_nodes = 0;
     for (ClusterBlockId cluster_blk_id : cluster_net_list.blocks()) {
         t_pl_loc block_loc = block_locs[cluster_blk_id].loc;
-        t_physical_tile_loc loc(block_loc.x,  block_loc.y, block_loc.layer);
+        t_physical_tile_loc loc(block_loc.x, block_loc.y, block_loc.layer);
         int abs_cap = block_loc.sub_tile;
         build_cluster_internal_edges(rr_graph_builder,
                                      num_collapsed_nodes,
diff --git a/vpr/src/timing/net_delay.cpp b/vpr/src/timing/net_delay.cpp
@@ -91,7 +91,7 @@ static void load_one_net_delay(const Netlist<>& net_list,
 static void load_one_net_delay_recurr(const RouteTreeNode& rt_node, ParentNetId net_id) {
     /* This routine recursively traverses the route tree, and copies the Tdel of the sink_type nodes *
      * into the map.                                                                                 */
-    if (rt_node.net_pin_index != UNDEFINED) {                        // value of UNDEFINED indicates a non-SINK
+    if (rt_node.net_pin_index != UNDEFINED) {                   // value of UNDEFINED indicates a non-SINK
         ipin_to_Tdel_map[rt_node.net_pin_index] = rt_node.Tdel; // add to the map, process current sink-type node
     }
 

Original file line number	Diff line number	Diff line change
`@@ -111,9 +111,9 @@ static void convert_flat_to_partial_placement(const FlatPlacementInfo& flat_plac`
`111`	`111`	`} else {`
`112`	`112`	`if (current_loc_x != -1 && current_loc_y != -1) {`
`113`	`113`	`atom_loc_x = std::clamp(current_loc_x, 0.0f,`
`114`		`- static_cast<float>(g_vpr_ctx.device().grid.width() -1));`
	`114`	`+ static_cast<float>(g_vpr_ctx.device().grid.width() - 1));`
`115`	`115`	`atom_loc_y = std::clamp(current_loc_y, 0.0f,`
`116`		`- static_cast<float>(g_vpr_ctx.device().grid.height() -1));`
	`116`	`+ static_cast<float>(g_vpr_ctx.device().grid.height() - 1));`
`117`	`117`	`// If current_loc_layer or current_loc_sub_tile are unset (-1), default to layer 0 and sub_tile 0.`
`118`	`118`	`if (current_loc_layer == -1)`
`119`	`119`	`current_loc_layer = 0;`
`@@ -155,7 +155,7 @@ static void convert_flat_to_partial_placement(const FlatPlacementInfo& flat_plac`
`155`	`155`	`}`
`156`	`156`	`}`
`157`	`157`	`VTR_LOG("%zu of %zu molecules placed at device center (no atoms of these molecules found in flat placement).\n",`
`158`		`- num_mols_assigned_to_center, ap_netlist.blocks().size());`
	`158`	`+ num_mols_assigned_to_center, ap_netlist.blocks().size());`
`159`	`159`	`}`
`160`	`160`
`161`	`161`	`/**`
Original file line number	Diff line number	Diff line change
`@@ -177,9 +177,9 @@ typedef std::pair<DelayTriple, std::string> sequential_port_delay_pair;`
`177`	`177`	`* @brief Information needed to describe a delay on a port in an SDF file.`
`178`	`178`	`*/`
`179`	`179`	`struct PortDelay {`
`180`		`- std::string port_name; ///<The name of the port to annotate with delay.`
`181`		`- int ipin; ///<The pin in the port to annotate (if a multi-pin port).`
`182`		`- DelayTriple port_delay_triple; ///<The delay triple to annotate.`
	`180`	`+ std::string port_name; ///<The name of the port to annotate with delay.`
	`181`	`+ int ipin; ///<The pin in the port to annotate (if a multi-pin port).`
	`182`	`+ DelayTriple port_delay_triple; ///<The delay triple to annotate.`
`183`	`183`	`};`
`184`	`184`
`185`	`185`	`/*enum class PortType {`
`@@ -1981,7 +1981,6 @@ class NetlistWriterVisitor : public NetlistVisitor {`
`1981`	`1981`
`1982`	`1982`	`ipin_port_delay_triple = new_port_delay_time;`
`1983`	`1983`	`}`
`1984`		`-`
`1985`	`1984`	`}`
`1986`	`1985`	`}`
`1987`	`1986`
`@@ -2007,7 +2006,6 @@ class NetlistWriterVisitor : public NetlistVisitor {`
`2007`	`2006`	`atom_netlist.pin_port_bit(clk_pin_id),`
`2008`	`2007`	`DelayTriple(thld, thld, thld));`
`2009`	`2008`	`}`
`2010`		`-`
`2011`	`2009`	`}`
`2012`	`2010`	`}`
`2013`	`2011`
`@@ -2116,7 +2114,6 @@ class NetlistWriterVisitor : public NetlistVisitor {`
`2116`	`2114`	`port->name,`
`2117`	`2115`	`ipin,`
`2118`	`2116`	`total_cq_delay_triple);`
`2119`		`-`
`2120`	`2117`	`}`
`2121`	`2118`	`}`
`2122`	`2119`	`}`
Original file line number	Diff line number	Diff line change
`@@ -96,7 +96,7 @@ void routing_stats(const Netlist<>& net_list,`
`96`	`96`	`} else {`
`97`	`97`	`area += type->area;`
`98`	`98`	`}`
`99`		`- }`
	`99`	`+ }`
`100`	`100`	`}`
`101`	`101`	`/* Todo: need to add pitch of routing to blocks with height > 3 */`
`102`	`102`	`VTR_LOG("\tTotal logic block area (Warning, need to add pitch of routing to blocks with height > 3): %g\n", area);`