File tree Expand file tree Collapse file tree 1 file changed +15
-14
lines changed
Expand file tree Collapse file tree 1 file changed +15
-14
lines changed Original file line number Diff line number Diff line change 22# https://github.com/duck2/uxsdcxx
33# Modify only if your build process doesn't involve regenerating this file.
44#
5- # Cmdline: uxsdcxx/uxsdcap.py /home/soheil/vtr /vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd
6- # Input file: /home/soheil/vtr /vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd
7- # md5sum of input file: 040903603053940a1b24392c38663b59
5+ # Cmdline: uxsdcxx/uxsdcap.py /dsoft/amohaghegh /vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd
6+ # Input file: /dsoft/amohaghegh /vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd
7+ # md5sum of input file: e14523c72a5db9cc83592d3baaf45780
88
9- @0xe7650575a8718aa2 ;
9+ @0xef4b0a4204785218 ;
1010using Cxx = import "/capnp/c++. capnp" ;
1111$Cxx.namespace("ucap" );
1212
@@ -235,14 +235,15 @@ struct RrEdges {
235235}
236236
237237struct RrGraph {
238- toolComment @0 :Text ;
239- toolName @1 :Text ;
240- toolVersion @2 :Text ;
241- channels @3 :Channels ;
242- switches @4 :Switches ;
243- segments @5 :Segments ;
244- blockTypes @6 :BlockTypes ;
245- grid @7 :GridLocs ;
246- rrNodes @8 :RrNodes ;
247- rrEdges @9 :RrEdges ;
238+ schemaFileId @0 :UInt64 ;
239+ toolComment @1 :Text ;
240+ toolName @2 :Text ;
241+ toolVersion @3 :Text ;
242+ channels @4 :Channels ;
243+ switches @5 :Switches ;
244+ segments @6 :Segments ;
245+ blockTypes @7 :BlockTypes ;
246+ grid @8 :GridLocs ;
247+ rrNodes @9 :RrNodes ;
248+ rrEdges @10 :RrEdges ;
248249}
You can’t perform that action at this time.
0 commit comments