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sdamghansdamghan
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Merge pull request #2077 from CAS-Atlantic/odin_check_netlist_discontinuity
Odin report removed unused nodes
2 parents a7f573b + b55ce03 commit 6c93392

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19 files changed

+281
-200
lines changed

19 files changed

+281
-200
lines changed

‎ODIN_II/SRC/include/odin_error.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,8 @@ enum odin_error {
2828
NETLIST,
2929
/* for blif parser errors */
3030
PARSE_BLIF,
31+
/* for blif output errors */
32+
OUTPUT_BLIF,
3133
/* for errors in the netlist simulation */
3234
SIMULATION,
3335
};

‎ODIN_II/SRC/include/odin_globals.h‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,14 @@
88
#include "read_xml_arch_file.h"
99
#include "HardSoftLogicMixer.hpp"
1010

11+
/**
12+
* The cutoff for the number of netlist nodes.
13+
* Technically, Odin-II prints statistics for
14+
* netlist nodes that the total number of them
15+
* is greater than this value.
16+
*/
17+
constexpr long long UNUSED_NODE_TYPE = 0;
18+
1119
extern t_logical_block_type* type_descriptors;
1220

1321
/* VERILOG SYNTHESIS GLOBALS */

‎ODIN_II/SRC/netlist_cleanup.cpp‎

Lines changed: 82 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -22,13 +22,15 @@
2222
*/
2323
#include <stdio.h>
2424
#include <stdlib.h>
25+
#include <algorithm> // std::fill
2526
#include <math.h>
2627
#include "odin_types.h"
2728
#include "odin_globals.h"
2829

2930
#include "netlist_utils.h"
3031
#include "vtr_util.h"
3132
#include "vtr_memory.h"
33+
#include "odin_ii.h"
3234

3335
bool coarsen_cleanup;
3436

@@ -48,8 +50,9 @@ struct node_list_t {
4850
node_list_t useless_nodes; // List of the nodes to be removed
4951
node_list_t* removal_list_next = &useless_nodes; // Tail of the nodes to be removed
5052

51-
node_list_t addsub_nodes; // List of the adder/subtractor nodes
52-
node_list_t* addsub_list_next = &addsub_nodes; // Tail of the adder/subtractor node list
53+
node_list_t addsub_nodes; // List of the adder/subtractor nodes
54+
node_list_t* addsub_list_next = &addsub_nodes; // Tail of the adder/subtractor node list
55+
long long num_removed_nodes[operation_list_END] = {0}; //List of removed nodes by type
5356

5457
/* Function declarations */
5558
node_list_t* insert_node_list(node_list_t* node_list, nnode_t* node);
@@ -60,6 +63,8 @@ void identify_unused_nodes(netlist_t* netlist);
6063
void remove_unused_nodes(node_list_t* remove);
6164
void calculate_addsub_statistics(node_list_t* addsub);
6265
void remove_unused_logic(netlist_t* netlist);
66+
void count_node_type(nnode_t* node);
67+
void report_removed_nodes(long long* node_list);
6368

6469
node_list_t* insert_node_list(node_list_t* node_list, nnode_t* node) {
6570
node_list->node = node;
@@ -103,6 +108,7 @@ void traverse_forward(nnode_t* node, int toplevel, int remove_me) {
103108
if (remove_me) {
104109
/* Add this node to the list of nodes to remove */
105110
removal_list_next = insert_node_list(removal_list_next, node);
111+
count_node_type(node);
106112
}
107113

108114
if (node->type == ADD || node->type == MINUS) {
@@ -237,11 +243,84 @@ void calculate_addsub_statistics(node_list_t* addsub) {
237243
/* Calculate the geometric mean carry chain length */
238244
geomean_addsub_length = exp(sum_of_addsub_logs / total_addsub_chain_count);
239245
}
246+
void count_node_type(nnode_t* node) {
247+
switch (node->type) {
248+
case LOGICAL_OR: //fallthrough
249+
case LOGICAL_AND: //fallthrough
250+
case LOGICAL_NOR: //fallthrough
251+
case LOGICAL_NAND: //fallthrough
252+
case LOGICAL_XOR: //fallthrough
253+
case LOGICAL_XNOR: //fallthrough
254+
case LOGICAL_NOT: //fallthrough
255+
num_removed_nodes[node->type]++;
256+
num_removed_nodes[GENERIC]++;
257+
break;
258+
259+
case MUX_2: //fallthrough
260+
case SMUX_2: //fallthrough
261+
num_removed_nodes[MUX_2]++;
262+
num_removed_nodes[GENERIC]++;
263+
break;
264+
265+
case GENERIC: //fallthrough
266+
num_removed_nodes[node->type]++;
267+
break;
268+
269+
case MINUS: //fallthrough
270+
/* Minus nodes are built of Add nodes */
271+
num_removed_nodes[ADD]++;
272+
break;
273+
274+
case PAD_NODE: //fallthrough
275+
case GND_NODE: //fallthrough
276+
case VCC_NODE: //fallthrough
277+
/* These are irrelevent so we dont output */
278+
break;
279+
280+
case INPUT_NODE: //fallthrough
281+
case OUTPUT_NODE: //fallthrough
282+
/* these stay untouched but are not added to the total*/
283+
num_removed_nodes[node->type]++;
284+
break;
285+
286+
case CLOCK_NODE: //fallthrough
287+
case FF_NODE: //fallthrough
288+
case MULTIPLY: //fallthrough
289+
case ADD: //fallthrough
290+
case MEMORY: //fallthrough
291+
case HARD_IP: //fallthrough
292+
/* these stay untouched */
293+
num_removed_nodes[node->type]++;
294+
break;
295+
296+
default:
297+
/* everything else is generic */
298+
num_removed_nodes[GENERIC]++;
299+
break;
300+
}
301+
}
302+
303+
void report_removed_nodes(long long* node_list) {
304+
// return if there is no removed logic
305+
if (!useless_nodes.node)
306+
return;
307+
308+
warning_message(NETLIST, unknown_location, "%s", "Following unused node(s) removed from the netlist:\n");
309+
for (int i = 0; i < operation_list_END; i++) {
310+
if (node_list[i] > UNUSED_NODE_TYPE) {
311+
std::string msg = std::string("Number of removed <")
312+
+ operation_list_STR[i][ODIN_LONG_STRING]
313+
+ "> node(s): ";
314+
printf("%-42s%lld\n", msg.c_str(), node_list[i]);
315+
}
316+
}
317+
}
240318

241319
/* Perform the backwards and forward sweeps and remove the unused nodes */
242320
void remove_unused_logic(netlist_t* netlist) {
243321
mark_output_dependencies(netlist);
244322
identify_unused_nodes(netlist);
245323
remove_unused_nodes(&useless_nodes);
324+
if (global_args.all_warnings) report_removed_nodes(num_removed_nodes);
246325
calculate_addsub_statistics(&addsub_nodes);
247-
}
326+
}

‎ODIN_II/SRC/netlist_statistic.cpp‎

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -12,14 +12,6 @@
1212
#include "odin_util.h"
1313
#include "vtr_memory.h"
1414

15-
/**
16-
* The cutoff for the number of netlist nodes.
17-
* Technically, Odin-II prints statistics for
18-
* netlist nodes that the total number of them
19-
* is greater than this value.
20-
*/
21-
#define UNUSED_NODE_TYPE 0
22-
2315
static void init(metric_t* m);
2416
static void print_stats(metric_t* m);
2517
static void copy(metric_t* dest, metric_t* src);

‎ODIN_II/SRC/odin_ii.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -147,7 +147,7 @@ static void optimization() {
147147
}
148148

149149
if (block_memories_info.read_only_memory_list || block_memories_info.block_memory_list) {
150-
/* Perform a hard block registration and splitting in width */
150+
/* Perform a hard block registration and splitting in width for Yosys generated memory blocks */
151151
iterate_block_memories(syn_netlist);
152152
free_block_memories();
153153
}

‎ODIN_II/regression_test/benchmark/task/fpu/hard_logic/simulation_result.json‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55
"generated_blif": "bfly_generated.blif",
66
"exit": 134,
77
"errors": [
8-
"[OUTPUT_BLIF] Could not resolve memory hard block fpu_mul~0 to a valid type."
8+
"[SIMULATION] Could not resolve memory hard block fpu_mul~0 to a valid type."
99
]
1010
},
1111
"hard_logic/bgm/hard_fpu_arch_timing": {
@@ -14,7 +14,7 @@
1414
"generated_blif": "bgm_generated.blif",
1515
"exit": 134,
1616
"errors": [
17-
"[OUTPUT_BLIF] Could not resolve memory hard block fpu_mul~6 to a valid type."
17+
"[SIMULATION] Could not resolve memory hard block fpu_mul~6 to a valid type."
1818
]
1919
},
2020
"hard_logic/dscg/hard_fpu_arch_timing": {
@@ -23,7 +23,7 @@
2323
"generated_blif": "dscg_generated.blif",
2424
"exit": 134,
2525
"errors": [
26-
"[OUTPUT_BLIF] Could not resolve memory hard block fpu_add~0 to a valid type."
26+
"[SIMULATION] Could not resolve memory hard block fpu_add~0 to a valid type."
2727
]
2828
},
2929
"hard_logic/fir/hard_fpu_arch_timing": {
@@ -32,7 +32,7 @@
3232
"generated_blif": "fir_generated.blif",
3333
"exit": 134,
3434
"errors": [
35-
"[OUTPUT_BLIF] Could not resolve memory hard block fpu_mul~0 to a valid type."
35+
"[SIMULATION] Could not resolve memory hard block fpu_mul~0 to a valid type."
3636
]
3737
},
3838
"hard_logic/mm3/hard_fpu_arch_timing": {
@@ -41,7 +41,7 @@
4141
"generated_blif": "mm3_generated.blif",
4242
"exit": 134,
4343
"errors": [
44-
"[OUTPUT_BLIF] Could not resolve memory hard block fpu_mul~0 to a valid type."
44+
"[SIMULATION] Could not resolve memory hard block fpu_mul~0 to a valid type."
4545
]
4646
},
4747
"hard_logic/ode/hard_fpu_arch_timing": {
@@ -50,7 +50,7 @@
5050
"generated_blif": "ode_generated.blif",
5151
"exit": 134,
5252
"errors": [
53-
"[OUTPUT_BLIF] Could not resolve memory hard block fpu_mul~0 to a valid type."
53+
"[SIMULATION] Could not resolve memory hard block fpu_mul~0 to a valid type."
5454
]
5555
},
5656
"hard_logic/syn2/hard_fpu_arch_timing": {
@@ -59,7 +59,7 @@
5959
"generated_blif": "syn2_generated.blif",
6060
"exit": 134,
6161
"errors": [
62-
"[OUTPUT_BLIF] Could not resolve memory hard block fpu_mul~5 to a valid type."
62+
"[SIMULATION] Could not resolve memory hard block fpu_mul~5 to a valid type."
6363
]
6464
},
6565
"hard_logic/syn7/hard_fpu_arch_timing": {
@@ -68,7 +68,7 @@
6868
"generated_blif": "syn7_generated.blif",
6969
"exit": 134,
7070
"errors": [
71-
"[OUTPUT_BLIF] Could not resolve memory hard block fpu_add~0 to a valid type."
71+
"[SIMULATION] Could not resolve memory hard block fpu_add~0 to a valid type."
7272
]
7373
},
7474
"DEFAULT": {

‎ODIN_II/regression_test/benchmark/task/keywords/always/simulation_result.json‎

Lines changed: 29 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -36,42 +36,42 @@
3636
"generated_blif": "always_clk_generated.blif",
3737
"exit": 134,
3838
"errors": [
39-
"[OUTPUT_BLIF] Vector files differ."
39+
"[SIMULATION] Vector files differ."
4040
],
4141
"warnings": [
42-
"[OUTPUT_BLIF] Vector 2 mismatch:",
43-
"[OUTPUT_BLIF] Vector 3 mismatch:",
44-
"[OUTPUT_BLIF] Vector 6 mismatch:",
45-
"[OUTPUT_BLIF] Vector 7 mismatch:",
46-
"[OUTPUT_BLIF] Vector 26 mismatch:",
47-
"[OUTPUT_BLIF] Vector 27 mismatch:",
48-
"[OUTPUT_BLIF] Vector 30 mismatch:",
49-
"[OUTPUT_BLIF] Vector 31 mismatch:"
42+
"[SIMULATION] Vector 2 mismatch:",
43+
"[SIMULATION] Vector 3 mismatch:",
44+
"[SIMULATION] Vector 6 mismatch:",
45+
"[SIMULATION] Vector 7 mismatch:",
46+
"[SIMULATION] Vector 26 mismatch:",
47+
"[SIMULATION] Vector 27 mismatch:",
48+
"[SIMULATION] Vector 30 mismatch:",
49+
"[SIMULATION] Vector 31 mismatch:"
5050
]
5151
},
5252
"always/always_posedge_negedge/no_arch": {
5353
"test_name": "always/always_posedge_negedge/no_arch",
5454
"generated_blif": "always_posedge_negedge_generated.blif",
5555
"exit": 134,
5656
"errors": [
57-
"[OUTPUT_BLIF] Vector files differ."
57+
"[SIMULATION] Vector files differ."
5858
],
5959
"warnings": [
60-
"[OUTPUT_BLIF] Vector 2 mismatch:",
61-
"[OUTPUT_BLIF] Vector 3 mismatch:",
62-
"[OUTPUT_BLIF] Vector 6 mismatch:",
63-
"[OUTPUT_BLIF] Vector 7 mismatch:",
64-
"[OUTPUT_BLIF] Vector 26 mismatch:",
65-
"[OUTPUT_BLIF] Vector 27 mismatch:",
66-
"[OUTPUT_BLIF] Vector 30 mismatch:",
67-
"[OUTPUT_BLIF] Vector 31 mismatch:"
60+
"[SIMULATION] Vector 2 mismatch:",
61+
"[SIMULATION] Vector 3 mismatch:",
62+
"[SIMULATION] Vector 6 mismatch:",
63+
"[SIMULATION] Vector 7 mismatch:",
64+
"[SIMULATION] Vector 26 mismatch:",
65+
"[SIMULATION] Vector 27 mismatch:",
66+
"[SIMULATION] Vector 30 mismatch:",
67+
"[SIMULATION] Vector 31 mismatch:"
6868
]
6969
},
7070
"always/always_asterisk_event/no_arch": {
7171
"test_name": "always/always_asterisk_event/no_arch",
7272
"generated_blif": "always_asterisk_event_generated.blif",
7373
"warnings": [
74-
"[OUTPUT_BLIF] Vector 0 equivalent but output vector has bits set when expecting don't care :"
74+
"[SIMULATION] Vector 0 equivalent but output vector has bits set when expecting don't care :"
7575
],
7676
"max_rss(MiB)": 30,
7777
"exec_time(ms)": 3.4,
@@ -89,7 +89,7 @@
8989
"test_name": "always/always_lone_asterisk/no_arch",
9090
"generated_blif": "always_lone_asterisk_generated.blif",
9191
"warnings": [
92-
"[OUTPUT_BLIF] Vector 0 equivalent but output vector has bits set when expecting don't care :"
92+
"[SIMULATION] Vector 0 equivalent but output vector has bits set when expecting don't care :"
9393
],
9494
"max_rss(MiB)": 29.8,
9595
"exec_time(ms)": 3.5,
@@ -108,17 +108,17 @@
108108
"generated_blif": "always_or_event_generated.blif",
109109
"exit": 134,
110110
"errors": [
111-
"[OUTPUT_BLIF] Vector files differ."
111+
"[SIMULATION] Vector files differ."
112112
],
113113
"warnings": [
114-
"[OUTPUT_BLIF] Vector 0 equivalent but output vector has bits set when expecting don't care :",
115-
"[OUTPUT_BLIF] Vector 1 equivalent but output vector has bits set when expecting don't care :",
116-
"[OUTPUT_BLIF] Vector 2 equivalent but output vector has bits set when expecting don't care :",
117-
"[OUTPUT_BLIF] Vector 3 equivalent but output vector has bits set when expecting don't care :",
118-
"[OUTPUT_BLIF] Vector 34 mismatch:",
119-
"[OUTPUT_BLIF] Vector 35 mismatch:",
120-
"[OUTPUT_BLIF] Vector 38 mismatch:",
121-
"[OUTPUT_BLIF] Vector 39 mismatch:"
114+
"[SIMULATION] Vector 0 equivalent but output vector has bits set when expecting don't care :",
115+
"[SIMULATION] Vector 1 equivalent but output vector has bits set when expecting don't care :",
116+
"[SIMULATION] Vector 2 equivalent but output vector has bits set when expecting don't care :",
117+
"[SIMULATION] Vector 3 equivalent but output vector has bits set when expecting don't care :",
118+
"[SIMULATION] Vector 34 mismatch:",
119+
"[SIMULATION] Vector 35 mismatch:",
120+
"[SIMULATION] Vector 38 mismatch:",
121+
"[SIMULATION] Vector 39 mismatch:"
122122
]
123123
},
124124
"DEFAULT": {

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