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Add default values to state decode in sramcontroller
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vtr_flow/benchmarks/verilog/boundtop.v

Lines changed: 17 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1785,7 +1785,23 @@ new_ram(
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end
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always @(*)
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begin
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begin
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next_state = state;
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temp_statepeek = statepeek;
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temp_data = data;
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temp_datavalid = datavalid;
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temp_waddress = waddress;
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// For the unregistered values, we have to pick default behavior;
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// these values are used in enough other defined states to appear to
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// be reasonable fallbacks, but putting this here does change design
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// intent:
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tm3_sram_we = 8'b11111111 ;
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tm3_sram_oe = 2'b11 ;
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tm3_sram_adsp = 1'b1 ;
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tm3_sram_data_xhdl0 = 0;
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tm3_sram_addr = 0;
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want_addr = 1'b1 ;
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want_data = 1'b0 ;
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case (state)
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0 :
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begin

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