verilog-to-routing
diff --git a/‎…strong_tight_floorplan/config/config.txt‎ ‎…strong_tight_floorplan/config/config.txt‎vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_tight_floorplan/config/config.txt renamed to vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/strong_tight_floorplan/config/config.txt b/‎…strong_tight_floorplan/config/config.txt‎ ‎…strong_tight_floorplan/config/config.txt‎vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_tight_floorplan/config/config.txt renamed to vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/strong_tight_floorplan/config/config.txt
diff --git a/‎…ight_floorplan/config/golden_results.txt‎ ‎…ight_floorplan/config/golden_results.txt‎vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_tight_floorplan/config/golden_results.txt renamed to vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/strong_tight_floorplan/config/golden_results.txt b/‎…ight_floorplan/config/golden_results.txt‎ ‎…ight_floorplan/config/golden_results.txt‎vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_tight_floorplan/config/golden_results.txt renamed to vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/strong_tight_floorplan/config/golden_results.txt
diff --git a/‎…ong_tight_floorplan/half_blocks_half.xml‎ ‎…ong_tight_floorplan/half_blocks_half.xml‎vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_tight_floorplan/half_blocks_half.xml renamed to vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/strong_tight_floorplan/half_blocks_half.xml b/‎…ong_tight_floorplan/half_blocks_half.xml‎ ‎…ong_tight_floorplan/half_blocks_half.xml‎vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_tight_floorplan/half_blocks_half.xml renamed to vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/strong_tight_floorplan/half_blocks_half.xml
diff --git a/‎…orplan/neuron_stratixiv_arch_timing.blif‎ ‎…orplan/neuron_stratixiv_arch_timing.blif‎vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_tight_floorplan/neuron_stratixiv_arch_timing.blif renamed to vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/strong_tight_floorplan/neuron_stratixiv_arch_timing.blif b/‎…orplan/neuron_stratixiv_arch_timing.blif‎ ‎…orplan/neuron_stratixiv_arch_timing.blif‎vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_tight_floorplan/neuron_stratixiv_arch_timing.blif renamed to vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/strong_tight_floorplan/neuron_stratixiv_arch_timing.blif
diff --git a/‎…ng_tight_floorplan/one_big_partition.xml‎ ‎…ng_tight_floorplan/one_big_partition.xml‎vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_tight_floorplan/one_big_partition.xml renamed to vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/strong_tight_floorplan/one_big_partition.xml b/‎…ng_tight_floorplan/one_big_partition.xml‎ ‎…ng_tight_floorplan/one_big_partition.xml‎vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_tight_floorplan/one_big_partition.xml renamed to vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/strong_tight_floorplan/one_big_partition.xml
diff --git a/‎…ong/strong_tight_floorplan/sixteenth.xml‎ ‎…st5/strong_tight_floorplan/sixteenth.xml‎vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_tight_floorplan/sixteenth.xml renamed to vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/strong_tight_floorplan/sixteenth.xml b/‎…ong/strong_tight_floorplan/sixteenth.xml‎ ‎…st5/strong_tight_floorplan/sixteenth.xml‎vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_tight_floorplan/sixteenth.xml renamed to vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/strong_tight_floorplan/sixteenth.xml
diff --git a/‎…oorplan/stratixiv_arch_neuron.timing.xml‎ ‎…oorplan/stratixiv_arch_neuron.timing.xml‎vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_tight_floorplan/stratixiv_arch_neuron.timing.xml renamed to vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/strong_tight_floorplan/stratixiv_arch_neuron.timing.xml b/‎…oorplan/stratixiv_arch_neuron.timing.xml‎ ‎…oorplan/stratixiv_arch_neuron.timing.xml‎vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_tight_floorplan/stratixiv_arch_neuron.timing.xml renamed to vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/strong_tight_floorplan/stratixiv_arch_neuron.timing.xml
diff --git a/‎vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/task_list.txt‎
Lines changed: 1 addition & 1 deletion b/‎vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/task_list.txt‎
Lines changed: 1 addition & 1 deletion
diff --git a/‎vtr_flow/tasks/regression_tests/vtr_reg_strong/task_list.txt‎
Lines changed: 0 additions & 1 deletion b/‎vtr_flow/tasks/regression_tests/vtr_reg_strong/task_list.txt‎
Lines changed: 0 additions & 1 deletion
@@ -1,2 +1,2 @@
 regression_tests/vtr_reg_nightly_test5/vpr_ispd
-
+regression_tests/vtr_reg_nightly_test5/strong_tight_floorplan
@@ -68,7 +68,6 @@ regression_tests/vtr_reg_strong/strong_sub_tiles
 regression_tests/vtr_reg_strong/strong_sub_tiles_directs
 regression_tests/vtr_reg_strong/strong_sweep_constant_outputs
 regression_tests/vtr_reg_strong/strong_target_pin_util
-regression_tests/vtr_reg_strong/strong_tight_floorplan
 regression_tests/vtr_reg_strong/strong_timing
 regression_tests/vtr_reg_strong/strong_timing_report_detail
 regression_tests/vtr_reg_strong/strong_timing_update_diff
Original file line number	Diff line number	Diff line change
`@@ -1,2 +1,2 @@`
`1`	`1`	`regression_tests/vtr_reg_nightly_test5/vpr_ispd`
`2`		`-`
	`2`	`+regression_tests/vtr_reg_nightly_test5/strong_tight_floorplan`