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sdamghansdamghan
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[Infra]: removing the Surelog and Yosys-F4PGA-Plugin submodules and adding them as External Project to VTR CMake
Signed-off-by: Seyed Alireza Damghani <sdamghan@unb.ca>
1 parent 4f7eeca commit 17337fe

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8 files changed

+66
-74
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8 files changed

+66
-74
lines changed

‎.github/scripts/build.sh‎

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@@ -4,11 +4,6 @@ set -e
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source $(dirname "$0")/common.sh
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# Update VtR submodules
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if [[ $CMAKE_PARAMS == *"-DYOSYS_SV_UHDM_PLUGIN=ON"* ]]; then
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make update_submodules
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fi
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$SPACER
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start_section "vtr.build" "${GREEN}Building..${NC}"

‎.github/scripts/run-vtr.sh‎

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@@ -13,8 +13,6 @@ if ! { [ $VTR_TEST == "vtr_reg_strong" ] || [ $VTR_TEST == "odin_reg_strong" ] \
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source $SCRIPT_DIR/vtr-full-setup.sh
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fi
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# Update VtR submodules
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source $SCRIPT_DIR/vtr-submodules.sh
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# Build VtR
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source $SCRIPT_DIR/vtr-build.sh
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# Run the reg test.

‎.github/scripts/vtr-submodules.sh‎

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‎.gitmodules‎

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‎Makefile‎

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@@ -59,7 +59,6 @@ export CTEST_OUTPUT_ON_FAILURE=TRUE
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#For a BUILD_TYPE without 'pgo', a single stage (non-pgo) compilation is performed.
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#Forward any targets that are not named 'distclean' or 'clean' to the generated Makefile
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ifneq ($(MAKECMDGOALS),update_submodules)
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ifneq ($(MAKECMDGOALS),distclean)
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ifneq ($(MAKECMDGOALS),clean)
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all $(MAKECMDGOALS):
@@ -109,12 +108,6 @@ endif #BUILD_TYPE
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@+$(MAKE) -C $(BUILD_DIR) $(MAKECMDGOALS)
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endif #clean
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endif #distclean
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endif #update_submodules
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# Update GitHub submodules exist in VTR repository
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update_submodules:
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@echo "Performing Git Submodule Recursive Update on the VTR Submodules..."
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git submodule update --init --recursive
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#Call the generated Makefile's clean, and then remove all cmake generated files
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distclean: clean

‎libs/EXTERNAL/CMakeLists.txt‎

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@@ -27,31 +27,35 @@ if(${ODIN_USE_YOSYS} OR ${WITH_YOSYS})
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add_subdirectory(libyosys)
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# adding a custom target to download (submodules), and compile Yosys plugins
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if(${YOSYS_SV_UHDM_PLUGIN})
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# keep record of the yosys DAT dir
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set(YOSYS_DATDIR ${libyosys_BINARY_DIR}/share/yosys)
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# keep record of the yosys-uhdm-plugin-integration path
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set(SURELOG_SOURCE_DIR ${CMAKE_CURRENT_SOURCE_DIR}/Surelog)
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set(SURELOG_BINARY_DIR ${SURELOG_SOURCE_DIR}/build)
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set(YOSYS_F4PGA_PLUGINS_SOURCE_DIR ${CMAKE_CURRENT_SOURCE_DIR}/yosys-f4pga-plugins)
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ExternalProject_Add(surelog
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# root directory for Surelog project
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PREFIX ""
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# building Surelog and UHDM in a custom target to avoid any target conflict with VTR targets
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if(${YOSYS_SV_UHDM_PLUGIN})
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# keep record of the yosys DAT dir
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set(YOSYS_DATDIR ${libyosys_BINARY_DIR}/share/yosys)
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# keep record of the yosys-uhdm-plugin-integration path
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set(SURELOG_SOURCE_DIR ${CMAKE_CURRENT_SOURCE_DIR}/Surelog)
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set(SURELOG_BINARY_DIR ${SURELOG_SOURCE_DIR}/build)
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set(YOSYS_F4PGA_PLUGINS_SOURCE_DIR ${CMAKE_CURRENT_SOURCE_DIR}/yosys-f4pga-plugins)
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# Surelog
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ExternalProject_Add(surelog
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# root directory for Surelog project
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PREFIX ""
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GIT_REPOSITORY https://github.com/chipsalliance/Surelog.git
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GIT_TAG 8da6fcba650826219ead335a3382c52f1c1d5690 # yosys-systemverilog release c7f1ded-2022-08-10
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GIT_PROGRESS TRUE
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# setting source, build and install directories
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SOURCE_DIR "${SURELOG_SOURCE_DIR}"
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# BINARY_DIR "${SURELOG_BINARY_DIR}"
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BUILD_IN_SOURCE ON
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INSTALL_DIR "${SURELOG_BINARY_DIR}"
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# define Surelog cache values
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CMAKE_CACHE_DEFAULT_ARGS
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"-DCMAKE_BUILD_TYPE:STRING=Release"
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"-DCMAKE_INSTALL_PREFIX:FILEPATH=${libyosys_BINARY_DIR}"
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"-DCMAKE_POSITION_INDEPENDENT_CODE:BOOL=ON"
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"-DCMAKE_WARN_DEPRECATED:BOOL=OFF"
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# setting source, build and install directories
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SOURCE_DIR "${SURELOG_SOURCE_DIR}"
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BUILD_IN_SOURCE TRUE
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INSTALL_DIR "${SURELOG_BINARY_DIR}"
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# define Surelog cache values
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CMAKE_CACHE_ARGS
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"-DCMAKE_BUILD_TYPE:STRING=Release"
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"-DCMAKE_INSTALL_PREFIX:PATH=${libyosys_BINARY_DIR}"
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"-DCMAKE_POSITION_INDEPENDENT_CODE:BOOL=ON"
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"-DCMAKE_WARN_DEPRECATED:BOOL=OFF"
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# redirect logs to a logfile
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LOG_BUILD ON
@@ -61,23 +65,44 @@ if(${ODIN_USE_YOSYS} OR ${WITH_YOSYS})
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LOG_CONFIGURE ON
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LOG_OUTPUT_ON_FAILURE ON
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# usefull flags
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EXCLUDE_FROM_ALL ON
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DEPENDS yosys
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)
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# building Surelog and UHDM in a custom target to avoid any target conflict with VTR targets
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add_custom_target(yosys-plugins ALL DEPENDS surelog yosys
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# uhdm
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COMMAND ${MAKE_PROGRAM} -C ${YOSYS_F4PGA_PLUGINS_SOURCE_DIR}
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PATH=${libyosys_BINARY_DIR}/bin/:$ENV{PATH}
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UHDM_INSTALL_DIR=${libyosys_BINARY_DIR}
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install
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-j${CMAKE_BUILD_PARALLEL_LEVEL}
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WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}
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)
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endif()
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# usefull flags
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ALWAYS TRUE
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DEPENDS yosys
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)
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ExternalProject_Add(yosys-plugins
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# root directory for the Yosys-F4PGA-Plugins project
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PREFIX ""
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GIT_REPOSITORY https://github.com/chipsalliance/yosys-f4pga-plugins.git
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GIT_TAG 3b3dcc5cc216f7a39d26a6d894c53b8aa3e10d71 # yosys-systemverilog release c7f1ded-2022-08-10
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GIT_PROGRESS TRUE
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# setting source, build and install directories
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SOURCE_DIR "${YOSYS_F4PGA_PLUGINS_SOURCE_DIR}"
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BUILD_IN_SOURCE TRUE
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INSTALL_DIR ""
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INSTALL_COMMAND ""
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CONFIGURE_COMMAND ""
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BUILD_COMMAND ${MAKE_PROGRAM} -C ${YOSYS_F4PGA_PLUGINS_SOURCE_DIR}
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PATH=${libyosys_BINARY_DIR}/bin/:$ENV{PATH}
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UHDM_INSTALL_DIR=${libyosys_BINARY_DIR}
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install -j${CMAKE_BUILD_PARALLEL_LEVEL}
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# redirect logs to a logfile
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LOG_BUILD ON
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LOG_UPDATE ON
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LOG_INSTALL ON
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LOG_DOWNLOAD ON
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LOG_CONFIGURE ON
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LOG_OUTPUT_ON_FAILURE ON
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# usefull flags
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ALWAYS TRUE
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DEPENDS surelog yosys
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)
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endif()
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# In addition to libyosys in the build folder, we copy the libyosys directory
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# into a temporary folder in the VTR root, named Yosys, to have access to Yosys

‎libs/EXTERNAL/Surelog‎

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‎libs/EXTERNAL/yosys-f4pga-plugins‎

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