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This repository was archived by the owner on Jun 6, 2025. It is now read-only.

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MachineV

Simple CPU implementation in Verilog

Project features

  1. Micro-programmed CPU with customizable instruction set
  2. JSON instruction definitions compiled into raw signal memory bitstream
  3. Simple assembler that works well with custom instructions
  4. Simple character-based GPU with VGA output (target device clock must be divisible by 25MHz)

Status

Project is still in its development stage Archived, PoC target achieved.