-
affinity::pin_to_core(),pin_to_core_id(),available_cores(),core_count() -
no_stdcompatible viacore_affinity2crate (nostddependency) - Re-exports
CoreIdfor direct use - NUMA-aware ring allocation (v0.5.0)
- Benchmark with pinning enabled vs disabled on multi-socket Xeon (v0.5.0)
-
channel_bounded(capacity, watermark)— non-lossy bounded channel -
Publisher::try_publish()→Err(PublishError::Full(value))when ring is full - Per-subscriber cursor tracking with publisher-side min-scan on slow path
- Zero overhead on default lossy
channel()(backpressure isOption::None) - 9 backpressure-specific tests including cross-thread correctness
-
WaitStrategyenum — fullyno_std, no OS primitives -
BusySpin— bare spin, zero wakeup latency -
YieldSpin—core::hint::spin_loop()(PAUSE on x86, YIELD on ARM) -
BackoffSpin— exponential backoff with increasing PAUSE bursts -
Adaptive { spin_iters, yield_iters }— three-phase escalation (default) -
recv_with(strategy)on bothSubscriberandSubscriberGroup
- Huge page allocation (2MB) via
mmap+MAP_HUGETLB(mem::mmap_huge_pages) -
Publisher::mlock()— lock ring pages in RAM (prevent swap/page faults) -
Publisher::prefault()— pre-fault all ring pages on demand - Cache line alignment verified at compile time (
const_assertonSlot) - NUMA-aware allocation via
set_mempolicy(v0.6.0)
-
Subscriber::total_received()/total_lagged()/receive_ratio() -
SubscriberGroup::total_received()/total_lagged()/receive_ratio() -
Publisher::sequence()— current sequence for lag computation - Optional RDTSC-stamped latency histogram (v0.6.0)
- Prometheus / StatsD export (v0.6.0)
-
examples/pinned_latency.rs— core-pinned RDTSC latency measurement -
examples/backpressure.rs— reliable order fill pipeline - Example: DPDK → Photon Ring pipeline (v0.6.0)
- Example: Solarflare ef_vi → Photon Ring fan-out (v0.6.0)
-
channel_mpmc()— CAS-based sequence claiming for multi-producer -
MpPublisher<T>— Clone + Send + Sync,&selfpublish - Ordered cursor advancement (consumers see messages in sequence)
- Benchmark MPMC vs SPMC to quantify the CAS overhead (future)
- Pipeline:
A → B → C—examples/pipeline.rs - Diamond:
A → {B, C} → D—examples/diamond.rs
-
mem::set_numa_preferred(node)— set memory policy for ring allocation -
mem::reset_numa_policy()— reset to system default
-
TypedBuswithpublisher::<T>(name)/subscribe::<T>(name) - Type-erased storage via
Box<dyn Any>, panics on type mismatch
- Lemire fastmod for non-power-of-two capacities
- is_pow2 branch for zero regression on power-of-two
- 15 new tests including exhaustive verification
-
then_with(),then_a_with(),then_b_with()APIs - Backward-compatible (existing APIs delegate with default)
-
#[photon(as_enum)]attribute for explicit enum marking - Compile error for unrecognized field types
-
photon-ring-async— runtime-agnostic async wrappers -
photon-ring-metrics— framework-agnostic observability
- Loom model for MPMC cursor protocol (4 scenarios)
- Full loom integration with source via cfg(loom) (future)
- proptest / cargo-fuzz property-based testing (future)
- ARM
WFEinstruction inBackoffSpinandYieldSpin(aarch64) - UMWAIT/TPAUSE implemented as
MonitorWait/MonitorWaitFallbackwith runtime CPUID detection - SPMC vs MPMC benchmark comparison (2.8 ns vs 11.7 ns, 4.2x CAS overhead)
- RISC-V
WRS(wait-on-reservation-set) when available
- TLA+ model of the seqlock-stamped ring protocol (
verification/seqlock.tla) -
NoTornReadsafety property verified in spec - MC.tla model config + README with TLC instructions
-
atomic-slotsfeature: Formal soundness gap closed. Seqlock data race (UB under Rust abstract machine) eliminated by decomposingT: Podpayloads into[AtomicU64; N]stripes. Zero performance regression on x86-64 (identical MOV instructions). Miri-passable. Seedocs/research-seqlock-alternatives.mdfor the constraint-anchored analysis that produced this design. - Loom-based concurrency testing (when loom supports seqlock patterns)
- Property-based testing with proptest
- Technical report outline (
docs/technical-report.md) - Structured for comparison with Disruptor, Aeron, Chronicle Queue
- Full paper text (future)
- Submit to a systems venue (future)