diff --git a/src/app/main/Makefile.mk b/src/app/main/Makefile.mk
index 4a328311f..375cf6176 100644
--- a/src/app/main/Makefile.mk
+++ b/src/app/main/Makefile.mk
@@ -4,10 +4,8 @@ app-y += acpi.c
 app-y += battery.c
 app-y += config.c
 app-$(CONFIG_HAVE_DGPU) += dgpu.c
-app-y += ecpm.c
 app-$(CONFIG_BUS_ESPI) += espi.c
 app-y += fan.c
-app-y += gctrl.c
 app-y += kbc.c
 app-y += kbscan.c
 app-y += keymap.c
diff --git a/src/app/main/ecpm.c b/src/app/main/ecpm.c
deleted file mode 100644
index 165741a0f..000000000
--- a/src/app/main/ecpm.c
+++ /dev/null
@@ -1,13 +0,0 @@
-// SPDX-License-Identifier: GPL-3.0-only
-
-#include <app/ecpm.h>
-#include <common/macro.h>
-
-void ecpm_init(void) {
-    // Clock gate EGPC, CIR, and SWUC
-    CGCTRL2 |= BIT(6) | BIT(5) | BIT(4);
-    // Clock gate UART, SSPI, and DBGR
-    CGCTRL3 |= BIT(2) | BIT(1) | BIT(0);
-    // Clock gate CEC
-    CGCTRL4 |= BIT(0);
-}
diff --git a/src/app/main/espi.c b/src/app/main/espi.c
index 70351c4a1..bd60d34c8 100644
--- a/src/app/main/espi.c
+++ b/src/app/main/espi.c
@@ -7,7 +7,6 @@
 #include <common/debug.h>
 #include <common/macro.h>
 #include <ec/ecpm.h>
-#include <ec/gctrl.h>
 #include <ec/gpio.h>
 
 #include <8051.h>
diff --git a/src/app/main/gctrl.c b/src/app/main/gctrl.c
deleted file mode 100644
index e721a4df6..000000000
--- a/src/app/main/gctrl.c
+++ /dev/null
@@ -1,10 +0,0 @@
-// SPDX-License-Identifier: GPL-3.0-only
-
-#include <app/gctrl.h>
-
-void gctrl_init(void) {
-    // Set I2EC as R/W
-    SPCTRL1 |= 0x03;
-    // Set PNPCFG base address
-    BADRSEL = 0;
-}
diff --git a/src/app/main/include/app/ecpm.h b/src/app/main/include/app/ecpm.h
deleted file mode 100644
index 7a1e99534..000000000
--- a/src/app/main/include/app/ecpm.h
+++ /dev/null
@@ -1,10 +0,0 @@
-// SPDX-License-Identifier: GPL-3.0-only
-
-#ifndef _APP_ECPM_H
-#define _APP_ECPM_H
-
-#include <ec/ecpm.h>
-
-void ecpm_init(void);
-
-#endif // _APP_ECPM_H
diff --git a/src/app/main/include/app/gctrl.h b/src/app/main/include/app/gctrl.h
deleted file mode 100644
index 98f457135..000000000
--- a/src/app/main/include/app/gctrl.h
+++ /dev/null
@@ -1,10 +0,0 @@
-// SPDX-License-Identifier: GPL-3.0-only
-
-#ifndef _APP_GCTRL_H
-#define _APP_GCTRL_H
-
-#include <ec/gctrl.h>
-
-void gctrl_init(void);
-
-#endif // _APP_GCTRL_H
diff --git a/src/app/main/main.c b/src/app/main/main.c
index d5aaf4fd9..b566b34bb 100644
--- a/src/app/main/main.c
+++ b/src/app/main/main.c
@@ -3,9 +3,7 @@
 #include <app/battery.h>
 #include <app/board.h>
 #include <app/dgpu.h>
-#include <app/ecpm.h>
 #include <app/fan.h>
-#include <app/gctrl.h>
 #include <app/kbc.h>
 #include <app/kbled.h>
 #include <app/kbscan.h>
@@ -17,8 +15,6 @@
 #include <app/smbus.h>
 #include <app/smfi.h>
 #include <app/usbpd.h>
-#include <arch/arch.h>
-#include <arch/delay.h>
 #include <arch/time.h>
 #include <board/gpio.h>
 #include <board/keymap.h>
@@ -57,16 +53,13 @@ uint8_t main_cycle = 0;
 
 void init(void) {
     // Must happen first
-    arch_init();
     ec_init();
-    gctrl_init();
     gpio_init();
 
     // Can happen in any order
 #if CONFIG_HAVE_DGPU
     dgpu_init();
 #endif
-    ecpm_init();
     kbc_init();
     kbled_init();
 #ifdef PARALLEL_DEBUG
diff --git a/src/ec/ite/ec.c b/src/ec/ite/ec.c
index 4553e97b4..9870378ab 100644
--- a/src/ec/ite/ec.c
+++ b/src/ec/ite/ec.c
@@ -1,21 +1,12 @@
 // SPDX-License-Identifier: GPL-3.0-only
 
 #include <ec/ec.h>
+#include <arch/arch.h>
+#include <ec/ecpm.h>
 #include <ec/gctrl.h>
 #include <common/debug.h>
 #include <common/macro.h>
 
-void ec_init(void) {
-#if CONFIG_EC_ITE_IT8587E
-    RSTS = (0b10U << 6) | BIT(2);
-#else
-    RSTS = (0b01U << 6) | BIT(2);
-
-    // Enable POST codes
-    SPCTRL1 |= BIT(7) | BIT(6) | BIT(3);
-#endif
-}
-
 void ec_read_post_codes(void) {
 #if CONFIG_EC_ITE_IT5570E || CONFIG_EC_ITE_IT5571E
     while (P80H81HS & 1) {
@@ -27,3 +18,35 @@ void ec_read_post_codes(void) {
     }
 #endif
 }
+
+static void gctrl_init(void) {
+    // Set I2EC as R/W
+    SPCTRL1 |= 0x03;
+    // Set PNPCFG base address
+    BADRSEL = 0;
+}
+
+static void ecpm_init(void) {
+    // Clock gate EGPC, CIR, and SWUC
+    CGCTRL2 |= BIT(6) | BIT(5) | BIT(4);
+    // Clock gate UART, SSPI, and DBGR
+    CGCTRL3 |= BIT(2) | BIT(1) | BIT(0);
+    // Clock gate CEC
+    CGCTRL4 |= BIT(0);
+}
+
+void ec_init(void) {
+    arch_init();
+
+#if CONFIG_EC_ITE_IT8587E
+    RSTS = (0b10U << 6) | BIT(2);
+#else
+    RSTS = (0b01U << 6) | BIT(2);
+
+    // Enable POST codes
+    SPCTRL1 |= BIT(7) | BIT(6) | BIT(3);
+#endif
+
+    gctrl_init();
+    ecpm_init();
+}