Multi-dimensional input/output declarations

[eymre]

I guess the grammar file needs update to the following lines to support multi-dimensional ports.

SVParser.g4:

Old:

inout_declaration
  : KW_INOUT ( net_type )? ( KW_SIGNED )? ( range )? list_of_port_identifiers
  ;
input_declaration
  : KW_INPUT ( net_type )? ( KW_SIGNED )? ( range )? list_of_port_identifiers
  | KW_INPUT variable_port_type list_of_variable_identifiers
  ;
output_declaration
  : KW_OUTPUT ( net_type )? ( KW_SIGNED )? ( range )? list_of_port_identifiers
  | KW_OUTPUT variable_port_type list_of_variable_identifiers
  ;

New:

// I/O declaration may have multi-dimensional range
inout_declaration
  : KW_INOUT ( net_type )? ( KW_SIGNED )? ( range )* list_of_port_identifiers
  ;
input_declaration
  : KW_INPUT ( net_type )? ( KW_SIGNED )? ( range )* list_of_port_identifiers
  | KW_INPUT variable_port_type list_of_variable_identifiers
  ;
output_declaration
  : KW_OUTPUT ( net_type )? ( KW_SIGNED )? ( range )* list_of_port_identifiers
  | KW_OUTPUT variable_port_type list_of_variable_identifiers
  ;

Thanks,

Edit: Formatting

[eymre]

Sample code:

module multi_dimension (
    input logic  [3:0] [4:0] i 
);
endmodule

[svstuff]

This example parses for me. The rules applied in my run are:

• module_ansi_header
• list_of_port_declarations
• port_declaration
• input_declaration
• variable_port_type
• data_type_no_class
• integer_vector_type (consumes "logic")
• packed_dimension
• packed_dimension

It's possible there's an ambiguity that causes your input to go down another route. Could you post the output from run.sh (if it's not sensitive)?