diff --git a/CHANGELOG.md b/CHANGELOG.md index cd6a5b38..376b8e86 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -10,6 +10,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ### Changed - `timer.rs` refactoring +- Add `rcc::Instance` trait ## [v0.11.0] - 2025-09-09 diff --git a/src/adc.rs b/src/adc.rs index 05ac87a6..ca5a7ef1 100644 --- a/src/adc.rs +++ b/src/adc.rs @@ -1,7 +1,6 @@ //! # API for the Analog to Digital converter use core::marker::PhantomData; -use core::ops::Deref; use embedded_hal_02::adc::{Channel, OneShot}; use fugit::HertzU32 as Hertz; @@ -9,7 +8,7 @@ use fugit::HertzU32 as Hertz; use crate::dma::dma2; use crate::dma::{dma1, CircBuffer, Receive, RxDma, Transfer, TransferPayload, W}; use crate::gpio::{self, Analog}; -use crate::rcc::{Enable, Rcc, Reset}; +use crate::rcc::Rcc; use crate::time::kHz; use core::sync::atomic::{self, Ordering}; use cortex_m::asm::delay; @@ -179,9 +178,7 @@ adc_pins!(pac::ADC3, #[derive(Copy, Clone, Debug, PartialEq, Eq, Default)] pub struct StoredConfig(SampleTime, Align); -pub trait Instance: - crate::Sealed + crate::Ptr + Deref + Reset + Enable -{ +pub trait Instance: crate::rcc::Instance + crate::Ptr { type ExtSel; #[doc(hidden)] fn set_extsel(&self, trigger: Self::ExtSel); diff --git a/src/can.rs b/src/can.rs index c65da30c..ec762092 100644 --- a/src/can.rs +++ b/src/can.rs @@ -63,7 +63,7 @@ impl CanExt for CAN { } } -pub trait Instance: crate::rcc::Enable + afio::CanCommon {} +pub trait Instance: crate::rcc::Instance + afio::CanCommon {} #[cfg(not(feature = "connectivity"))] use pac::CAN as CAN1; #[cfg(feature = "connectivity")] diff --git a/src/i2c.rs b/src/i2c.rs index 5850806f..6350a540 100644 --- a/src/i2c.rs +++ b/src/i2c.rs @@ -22,9 +22,8 @@ use crate::afio::{self, RInto, Rmp}; use crate::pac::{self, i2c1}; -use crate::rcc::{BusClock, Clocks, Enable, Rcc, Reset}; +use crate::rcc::{BusClock, Clocks, Rcc}; use crate::time::{kHz, Hertz}; -use core::ops::Deref; pub mod blocking; pub use blocking::BlockingI2c; @@ -115,12 +114,7 @@ pub struct I2c { } pub trait Instance: - crate::Sealed - + Deref - + Enable - + Reset - + BusClock - + afio::I2cCommon + crate::rcc::Instance + crate::Ptr + afio::I2cCommon { } @@ -151,7 +145,7 @@ impl Rmp { I2C::enable(rcc); I2C::reset(rcc); - let pclk1 = I2C::clock(&rcc.clocks); + let pclk1 = I2C::Bus::clock(&rcc.clocks); assert!(mode.get_frequency() <= kHz(400)); diff --git a/src/rcc.rs b/src/rcc.rs index c926d36e..c0b05a88 100644 --- a/src/rcc.rs +++ b/src/rcc.rs @@ -429,6 +429,12 @@ impl Clocks { } } +/// Common trait for most of peripherals +pub trait Instance: + crate::Ptr + crate::Steal + Enable + Reset + RccBus + Deref +{ +} + /// Frequency on bus that peripheral is connected in pub trait BusClock { /// Calculates frequency depending on `Clock` state @@ -441,26 +447,6 @@ pub trait BusTimerClock { fn timer_clock(clocks: &Clocks) -> Hertz; } -impl BusClock for T -where - T: RccBus, - T::Bus: BusClock, -{ - fn clock(clocks: &Clocks) -> Hertz { - T::Bus::clock(clocks) - } -} - -impl BusTimerClock for T -where - T: RccBus, - T::Bus: BusTimerClock, -{ - fn timer_clock(clocks: &Clocks) -> Hertz { - T::Bus::timer_clock(clocks) - } -} - impl BusClock for AHB { fn clock(clocks: &Clocks) -> Hertz { clocks.hclk diff --git a/src/rcc/enable.rs b/src/rcc/enable.rs index 2bd7a9b4..71d7f729 100644 --- a/src/rcc/enable.rs +++ b/src/rcc/enable.rs @@ -45,6 +45,7 @@ macro_rules! bus_reset { macro_rules! bus { ($($PER:ident => ($busX:ty, $bit:literal),)+) => { $( + impl crate::rcc::Instance for crate::pac::$PER {} impl RccBus for crate::pac::$PER { type Bus = $busX; } diff --git a/src/serial.rs b/src/serial.rs index 838036dd..e6c1117c 100644 --- a/src/serial.rs +++ b/src/serial.rs @@ -90,7 +90,6 @@ //! ``` use core::marker::PhantomData; -use core::ops::Deref; use core::sync::atomic::{self, Ordering}; use embedded_dma::{ReadBuffer, WriteBuffer}; @@ -99,8 +98,8 @@ use crate::afio::{self, RInto, Rmp}; use crate::dma::dma2; use crate::dma::{self, dma1, CircBuffer, RxDma, Transfer, TxDma}; use crate::gpio::{Floating, PushPull, UpMode}; -use crate::pac::{self}; -use crate::rcc::{BusClock, Clocks, Enable, Rcc, Reset}; +use crate::pac; +use crate::rcc::{BusClock, Clocks, Rcc}; use crate::time::{Bps, U32Ext}; mod hal_02; @@ -197,16 +196,7 @@ impl RBExt for pac::uart4::RegisterBlock { } } -pub trait Instance: - crate::Sealed - + crate::Ptr - + Deref - + Enable - + Reset - + BusClock - + afio::SerialAsync -{ -} +pub trait Instance: crate::rcc::Instance + crate::Ptr + afio::SerialAsync {} macro_rules! inst { ($($USARTX:ty;)+) => { @@ -562,7 +552,7 @@ fn apply_config(config: Config, clocks: &Clocks) { let usart = unsafe { &*USART::ptr() }; // Configure baud rate - let brr = USART::clock(clocks).raw() / config.baudrate.0; + let brr = USART::Bus::clock(clocks).raw() / config.baudrate.0; assert!(brr >= 16, "impossible baud rate"); usart.brr().write(|w| unsafe { w.bits(brr as u16) }); diff --git a/src/spi.rs b/src/spi.rs index b21cf823..a46d6f73 100644 --- a/src/spi.rs +++ b/src/spi.rs @@ -75,7 +75,7 @@ use crate::dma::dma1; use crate::dma::dma2; use crate::dma::{self, Receive, RxDma, RxTxDma, Transfer, TransferPayload, Transmit, TxDma}; use crate::gpio::{Floating, PushPull, UpMode}; -use crate::rcc::{BusClock, Enable, Rcc, Reset}; +use crate::rcc::{BusClock, Rcc}; use crate::time::Hertz; use core::sync::atomic::{self, Ordering}; @@ -314,12 +314,7 @@ pub enum SpiBitFormat { } pub trait Instance: - crate::Sealed - + Deref - + Enable - + Reset - + BusClock - + afio::SpiCommon + crate::rcc::Instance + crate::Ptr + afio::SpiCommon { } @@ -348,7 +343,7 @@ impl Rmp { // disable SS output spi.cr2().write(|w| w.ssoe().clear_bit()); - let br = match SPI::clock(&rcc.clocks) / freq { + let br = match SPI::Bus::clock(&rcc.clocks) / freq { 0 => unreachable!(), 1..=2 => 0b000, 3..=5 => 0b001, diff --git a/src/timer.rs b/src/timer.rs index ffa5c00a..e5b1ad19 100644 --- a/src/timer.rs +++ b/src/timer.rs @@ -51,7 +51,7 @@ use crate::bb; use crate::pac::{self, DBGMCU as DBG}; -use crate::rcc::{self, Clocks, Rcc}; +use crate::rcc::{self, BusTimerClock, Clocks, Rcc}; use core::convert::TryFrom; use cortex_m::peripheral::syst::SystClkSource; use cortex_m::peripheral::SYST; @@ -421,7 +421,7 @@ mod sealed { pub(crate) use sealed::{Advanced, General, MasterTimer, WithCapture, WithChannel, WithPwm}; pub trait Instance: - crate::Sealed + rcc::Enable + rcc::Reset + rcc::BusTimerClock + rcc::StopInDebug + General + rcc::Instance + rcc::RccBus + rcc::StopInDebug + General { } @@ -777,13 +777,13 @@ impl Timer { TIM::reset(rcc); Self { - clk: TIM::timer_clock(&rcc.clocks), + clk: TIM::Bus::timer_clock(&rcc.clocks), tim, } } pub fn configure(&mut self, clocks: &Clocks) { - self.clk = TIM::timer_clock(clocks); + self.clk = TIM::Bus::timer_clock(clocks); } pub fn counter_hz(self) -> CounterHz { @@ -860,7 +860,7 @@ impl FTimer { /// Calculate prescaler depending on `Clocks` state pub fn configure(&mut self, clocks: &Clocks) { - let clk = TIM::timer_clock(clocks); + let clk = TIM::Bus::timer_clock(clocks); assert!(clk.raw() % FREQ == 0); let psc = clk.raw() / FREQ; self.tim.set_prescaler(u16::try_from(psc - 1).unwrap());