Tentative PTP support on H7 as well :D

Author: datdenkikniet

examples/common.rs

@@ -30,7 +30,7 @@ pub fn setup_peripherals(p: stm32_eth::stm32::Peripherals) -> (Clocks, Gpio, Par
         mtl: p.ETHERNET_MTL,
         #[cfg(feature = "f-series")]
         mmc: p.ETHERNET_MMC,
-        #[cfg(feature = "ptp")]
+        #[cfg(all(feature = "ptp", feature = "f-series"))]
         ptp: p.ETHERNET_PTP,
     };
 

examples/rtic-timestamp.rs

@@ -48,7 +48,7 @@ mod app {
         },
         mac::Speed,
         ptp::{EthernetPTP, Timestamp},
-        Parts,
+        Parts, MTU,
     };
 
     #[local]
@@ -65,19 +65,27 @@ mod app {
     #[monotonic(binds = SysTick, default = true)]
     type Monotonic = Systick<1000>;
 
-    #[init(local = [
-        rx_desc: [RxDescriptor; 2] = [RxDescriptor::new(); 2],
-        tx_desc: [TxDescriptor; 2] = [TxDescriptor::new(); 2],
-        rx_buffers: [[u8; 1522]; 2] = [[0u8; stm32_eth::MTU]; 2],
-        tx_buffers: [[u8; 1522]; 2] = [[0u8; stm32_eth::MTU]; 2],
-    ])]
+    /// On H7s, the ethernet DMA does not have access to the normal ram
+    /// so we must explicitly put them in SRAM.
+    #[cfg_attr(feature = "stm32h7xx-hal", link_section = ".sram1.eth")]
+    static mut TX_DESCRIPTORS: [TxDescriptor; 4] = [TxDescriptor::new(); 4];
+    #[cfg_attr(feature = "stm32h7xx-hal", link_section = ".sram1.eth")]
+    static mut TX_BUFFERS: [[u8; MTU + 2]; 4] = [[0u8; MTU + 2]; 4];
+    #[cfg_attr(feature = "stm32h7xx-hal", link_section = ".sram1.eth2")]
+    static mut RX_DESCRIPTORS: [RxDescriptor; 4] = [RxDescriptor::new(); 4];
+    #[cfg_attr(feature = "stm32h7xx-hal", link_section = ".sram1.eth2")]
+    static mut RX_BUFFERS: [[u8; MTU + 2]; 4] = [[0u8; MTU + 2]; 4];
+
+    #[init]
     fn init(cx: init::Context) -> (Shared, Local, init::Monotonics) {
         defmt::info!("Pre-init");
         let core = cx.core;
         let p = cx.device;
 
-        let rx_ring = RxDescriptorRing::new(cx.local.rx_desc, cx.local.rx_buffers);
-        let tx_ring = TxDescriptorRing::new(cx.local.tx_desc, cx.local.tx_buffers);
+        let rx_ring =
+            RxDescriptorRing::new(unsafe { &mut RX_DESCRIPTORS }, unsafe { &mut RX_BUFFERS });
+        let tx_ring =
+            TxDescriptorRing::new(unsafe { &mut TX_DESCRIPTORS }, unsafe { &mut TX_BUFFERS });
 
         let (clocks, gpio, ethernet) = crate::common::setup_peripherals(p);
         let mono = Systick::new(core.SYST, clocks.hclk().raw());
@@ -88,13 +96,15 @@ mod app {
         defmt::info!("Configuring ethernet");
 
         let Parts { dma, mac, mut ptp } =
-            stm32_eth::new_with_mii(ethernet, rx_ring, tx_ring, clocks, pins, mdio, mdc).unwrap();
+            stm32_eth::new(ethernet, rx_ring, tx_ring, clocks, pins).unwrap();
 
+        #[cfg(not(feature = "stm32h7xx-hal"))]
         ptp.enable_pps(pps);
 
         defmt::info!("Enabling interrupts");
         dma.enable_interrupt();
 
+        #[cfg(not(feature = "stm32h7xx-hal"))]
         match EthernetPhy::from_miim(mac, 0) {
             Ok(mut phy) => {
                 defmt::info!(
@@ -151,14 +161,15 @@ mod app {
         // incorrect, but works well enough in low-activity systems (such as this example).
         let now = (cx.shared.ptp, cx.shared.scheduled_time).lock(|ptp, sched_time| {
             let now = ptp.get_time();
-            #[cfg(not(feature = "stm32f107"))]
+            #[cfg(not(any(feature = "stm32f107", feature = "stm32h7xx-hal")))]
             {
                 let in_half_sec = now
                     + Timestamp::new(
                         false,
                         0,
                         stm32_eth::ptp::Subseconds::new_from_nanos(500_000_000).unwrap(),
                     );
+
                 ptp.configure_target_time_interrupt(in_half_sec);
             }
             *sched_time = Some(now);
@@ -201,7 +212,7 @@ mod app {
             .lock(|dma, tx_id, ptp, _sched_time| {
                 dma.interrupt_handler();
 
-                #[cfg(not(feature = "stm32f107"))]
+                #[cfg(not(any(feature = "stm32f107", feature = "stm32h7xx-hal")))]
                 {
                     if ptp.interrupt_handler() {
                         if let Some(sched_time) = _sched_time.take() {

src/dma/rx/h_desc.rs

@@ -216,25 +216,7 @@ impl RxDescriptor {
 impl RxDescriptor {
     /// Get PTP timestamps if available
     pub(super) fn read_timestamp(&self) -> Option<Timestamp> {
-        #[cfg(not(feature = "stm32f1xx-hal"))]
-        let is_valid = {
-            /// RX timestamp
-            const RXDESC_0_TIMESTAMP_VALID: u32 = 1 << 7;
-            self.inner_raw.read(0) & RXDESC_0_TIMESTAMP_VALID == RXDESC_0_TIMESTAMP_VALID
-        };
-
-        #[cfg(feature = "stm32f1xx-hal")]
-        // There is no "timestamp valid" indicator bit
-        // on STM32F1XX
-        let is_valid = true;
-
-        let timestamp = Timestamp::from_descriptor(&self.inner_raw);
-
-        if is_valid && self.is_last() {
-            timestamp
-        } else {
-            None
-        }
+        todo!();
     }
 
     fn attach_timestamp(&mut self) {

src/dma/tx/h_desc.rs

@@ -144,6 +144,10 @@ impl TxDescriptor {
         }
     }
 
+    fn is_last(&self) -> bool {
+        (self.inner_raw.read(3) & TXDESC_3_LD) == TXDESC_3_LD
+    }
+
     // Placeholder for API parity with f-series descriptor.
     pub(super) fn setup(&mut self, _: &[u8]) {}
 
@@ -216,12 +220,11 @@ impl TxDescriptor {
 #[cfg(feature = "ptp")]
 impl TxDescriptor {
     fn read_timestamp(&mut self) -> Option<Timestamp> {
-        let tdes0 = self.inner_raw.read(0);
-
-        let contains_timestamp = (tdes0 & TXDESC_0_TIMESTAMP_STATUS) == TXDESC_0_TIMESTAMP_STATUS;
+        let contains_timestamp = (self.inner_raw.read(3) & TXDESC_3_TTSS) == TXDESC_3_TTSS;
 
-        if !self.is_owned() && contains_timestamp && Self::is_last(tdes0) {
-            Timestamp::from_descriptor(&self.inner_raw)
+        if !self.is_owned() && contains_timestamp && self.is_last() {
+            let (low, high) = (self.inner_raw.read(0), self.inner_raw.read(1));
+            Some(Timestamp::from_parts(high, low))
         } else {
             None
         }

src/lib.rs

@@ -125,7 +125,12 @@ where
 
     // Configure the ethernet PTP
     #[cfg(feature = "ptp")]
-    let ptp = EthernetPTP::new(parts.ptp.into(), clocks, &dma);
+    let ptp = EthernetPTP::new(
+        #[cfg(feature = "f-series")]
+        parts.ptp.into(),
+        clocks,
+        &dma,
+    );
 
     // Configure the ethernet MAC
     let mac = EthernetMAC::new(mac_parts, clocks, Speed::FullDuplexBase100Tx, &dma)?;

src/mac/mod.rs

@@ -287,19 +287,18 @@ impl EthernetMAC {
         EthernetMACWithMii::new(self, mdio, mdc)
     }
 
-    #[cfg(feature = "ptp")]
+    #[cfg(all(feature = "ptp", feature = "f-series"))]
     pub(crate) fn mask_timestamp_trigger_interrupt() {
         // SAFETY: MACIMR only receives atomic writes.
         let mac = &unsafe { &*ETHERNET_MAC::ptr() };
         mac.macimr.write(|w| w.tstim().set_bit());
     }
 
     // NOTE(allow): only used on F4 and F7
-    #[cfg(feature = "ptp")]
-    #[allow(dead_code)]
+    #[cfg(all(feature = "ptp", feature = "f-series"))]
     pub(crate) fn unmask_timestamp_trigger_interrupt() {
         // SAFETY: MACIMR only receives atomic writes.
-        let macimr = &unsafe { &*ETHERNET_MAC::ptr() }.macimr;
-        macimr.write(|w| w.tstim().clear_bit());
+        let mac = &unsafe { &*ETHERNET_MAC::ptr() };
+        mac.macimr.write(|w| w.tstim().clear_bit());
     }
 }