Add ESP32 support

Author: arjanmels

src/generate/device.rs

@@ -97,6 +97,11 @@ pub fn render(
                 extern crate riscv_rt;
             });
         }
+        Target::ESP32 => {
+            out.extend(quote! {
+                extern crate xtensa_lx6_rt;
+            });
+        }
         Target::None => {}
     }
 
@@ -226,6 +231,7 @@ pub fn render(
         Target::CortexM => Some(Ident::new("cortex_m", span)),
         Target::Msp430 => Some(Ident::new("msp430", span)),
         Target::RISCV => Some(Ident::new("riscv", span)),
+        Target::ESP32 => Some(Ident::new("xtensa_lx6_rt", span)),
         Target::None => None,
     }
     .map(|krate| {

src/generate/interrupt.rs

@@ -125,6 +125,30 @@ pub fn render(
             });
         }
         Target::RISCV => {}
+        Target::ESP32 => {
+            for name in &names {
+                writeln!(device_x, "PROVIDE({} = DefaultHandler);", name)?;
+            }
+
+            root.extend(quote! {
+                #[cfg(feature = "rt")]
+                extern "C" {
+                    #(fn #names();)*
+                }
+
+                #[doc(hidden)]
+                pub union Vector {
+                    pub _handler: unsafe extern "C" fn(),
+                    _reserved: u32,
+                }
+
+                #[cfg(feature = "rt")]
+                #[doc(hidden)]
+                pub static __INTERRUPTS: [Vector; #n] = [
+                    #elements
+                ];
+            });
+        }
         Target::None => {}
     }
 
@@ -137,7 +161,7 @@ pub fn render(
 
     let interrupt_enum = quote! {
         ///Enumeration of all the interrupts
-        #[derive(Copy, Clone, Debug)]
+        #[derive(Copy, Clone, Debug, PartialEq, Eq)]
         #enum_repr
         pub enum Interrupt {
             #variants
@@ -178,7 +202,7 @@ pub fn render(
             _ => "C",
         };
 
-        if target != Target::CortexM && target != Target::Msp430 {
+        if target != Target::CortexM && target != Target::Msp430 && target != Target::ESP32 {
             mod_items.extend(quote! {
                 #[cfg(feature = "rt")]
                 #[macro_export]

src/lib.rs

@@ -18,9 +18,9 @@
 //!
 //! # Usage
 //!
-//! `svd2rust` supports Cortex-M, MSP430 and RISCV microcontrollers. The generated crate can be
-//! tailored for either architecture using the `--target` flag. The flag accepts "cortex-m",
-//! "msp430", "riscv" and "none" as values. "none" can be used to generate a crate that's
+//! `svd2rust` supports Cortex-M, MSP430, RISCV and ESP32 microcontrollers. The generated crate can
+//! be tailored for either architecture using the `--target` flag. The flag accepts "cortex-m",
+//! "msp430", "riscv", "esp32" and "none" as values. "none" can be used to generate a crate that's
 //! architecture agnostic and that should work for architectures that `svd2rust` doesn't currently
 //! know about like the Cortex-A architecture.
 //!

src/main.rs

@@ -103,7 +103,7 @@ fn run() -> Result<()> {
     file.write_all(data.as_ref())
         .expect("Could not write code to lib.rs");
 
-    if target == Target::CortexM || target == Target::Msp430 {
+    if target == Target::CortexM || target == Target::Msp430 || target == Target::ESP32 {
         writeln!(File::create("device.x")?, "{}", device_x)?;
         writeln!(File::create("build.rs")?, "{}", build_rs())?;
     }

src/util.rs

@@ -18,6 +18,7 @@ pub enum Target {
     CortexM,
     Msp430,
     RISCV,
+    ESP32,
     None,
 }
 
@@ -27,6 +28,7 @@ impl Target {
             "cortex-m" => Target::CortexM,
             "msp430" => Target::Msp430,
             "riscv" => Target::RISCV,
+            "esp32" => Target::ESP32,
             "none" => Target::None,
             _ => bail!("unknown target {}", s),
         })