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Generate traits on reg spec, not type alias
1 parent 69fb8f2 commit 85ec683

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2 files changed

+56
-33
lines changed

2 files changed

+56
-33
lines changed

src/generate/generic.rs

Lines changed: 48 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,15 @@
11
use core::marker;
22

3+
pub trait Register {
4+
type Ux: Copy;
5+
}
6+
7+
pub trait ReadableRegister: Register {}
8+
pub trait WritableRegister: Register {}
9+
pub trait ResettableRegister: Register {
10+
fn reset_value() -> Self::Ux;
11+
}
12+
313
/// Trait implemented by readable registers to enable the `read` method.
414
///
515
/// Registers marked with `Writable` can be also `modify`'ed.
@@ -28,32 +38,41 @@ pub trait ResetValue: RawType {
2838
}
2939

3040
/// This structure provides volatile access to registers.
31-
pub struct Reg<U, REG> {
32-
register: vcell::VolatileCell<U>,
41+
pub struct Reg<REG: Register> {
42+
register: vcell::VolatileCell<REG::Ux>,
3343
_marker: marker::PhantomData<REG>,
3444
}
3545

36-
unsafe impl<U: Send, REG> Send for Reg<U, REG> {}
46+
impl<REG: ReadableRegister> Readable for Reg<REG> {}
47+
impl<REG: WritableRegister> Writable for Reg<REG> {}
48+
impl<REG: ResettableRegister> ResetValue for Reg<REG> {
49+
#[inline(always)]
50+
fn reset_value() -> Self::Ux {
51+
REG::reset_value()
52+
}
53+
}
54+
55+
unsafe impl<REG: Register> Send for Reg<REG> where REG::Ux: Send {}
3756

38-
impl<U, REG> Reg<U, REG>
57+
impl<REG: Register> Reg<REG>
3958
where
40-
U: Copy,
59+
REG::Ux: Copy,
4160
{
4261
/// Returns the underlying memory address of register.
4362
///
4463
/// ```ignore
4564
/// let reg_ptr = periph.reg.as_ptr();
4665
/// ```
4766
#[inline(always)]
48-
pub fn as_ptr(&self) -> *mut U {
67+
pub fn as_ptr(&self) -> *mut REG::Ux {
4968
self.register.as_ptr()
5069
}
5170
}
5271

53-
impl<U, REG> Reg<U, REG>
72+
impl<REG: Register> Reg<REG>
5473
where
5574
Self: Readable,
56-
U: Copy,
75+
REG::Ux: Copy,
5776
{
5877
/// Reads the contents of a `Readable` register.
5978
///
@@ -68,25 +87,25 @@ where
6887
/// let flag = reader.field2().bit_is_set();
6988
/// ```
7089
#[inline(always)]
71-
pub fn read(&self) -> R<U, Self> {
90+
pub fn read(&self) -> R<REG::Ux, Self> {
7291
R {
7392
bits: self.register.get(),
7493
_reg: marker::PhantomData,
7594
}
7695
}
7796
}
7897

79-
impl<U, REG> RawType for Reg<U, REG>
98+
impl<REG: Register> RawType for Reg<REG>
8099
where
81-
U: Copy,
100+
REG::Ux: Copy,
82101
{
83-
type Ux = U;
102+
type Ux = REG::Ux;
84103
}
85104

86-
impl<U, REG> Reg<U, REG>
105+
impl<REG: Register> Reg<REG>
87106
where
88-
Self: ResetValue + RawType<Ux = U> + Writable,
89-
U: Copy,
107+
Self: ResetValue + RawType<Ux = REG::Ux> + Writable,
108+
REG::Ux: Copy,
90109
{
91110
/// Writes the reset value to `Writable` register.
92111
///
@@ -97,10 +116,10 @@ where
97116
}
98117
}
99118

100-
impl<U, REG> Reg<U, REG>
119+
impl<REG: Register> Reg<REG>
101120
where
102-
Self: ResetValue + RawType<Ux = U> + Writable,
103-
U: Copy
121+
Self: ResetValue + RawType<Ux = REG::Ux> + Writable,
122+
REG::Ux: Copy
104123
{
105124
/// Writes bits to a `Writable` register.
106125
///
@@ -120,7 +139,7 @@ where
120139
#[inline(always)]
121140
pub fn write<F>(&self, f: F)
122141
where
123-
F: FnOnce(&mut W<U, Self>) -> &mut W<U, Self>,
142+
F: FnOnce(&mut W<REG::Ux, Self>) -> &mut W<REG::Ux, Self>,
124143
{
125144
self.register.set(
126145
f(&mut W {
@@ -132,33 +151,33 @@ where
132151
}
133152
}
134153

135-
impl<U, REG> Reg<U, REG>
154+
impl<REG: Register> Reg<REG>
136155
where
137156
Self: Writable,
138-
U: Copy + Default,
157+
REG::Ux: Copy + Default,
139158
{
140159
/// Writes 0 to a `Writable` register.
141160
///
142161
/// Similar to `write`, but unused bits will contain 0.
143162
#[inline(always)]
144163
pub fn write_with_zero<F>(&self, f: F)
145164
where
146-
F: FnOnce(&mut W<U, Self>) -> &mut W<U, Self>,
165+
F: FnOnce(&mut W<REG::Ux, Self>) -> &mut W<REG::Ux, Self>,
147166
{
148167
self.register.set(
149168
f(&mut W {
150-
bits: U::default(),
169+
bits: REG::Ux::default(),
151170
_reg: marker::PhantomData,
152171
})
153172
.bits,
154173
);
155174
}
156175
}
157176

158-
impl<U, REG> Reg<U, REG>
177+
impl<REG: Register> Reg<REG>
159178
where
160179
Self: Readable + Writable,
161-
U: Copy,
180+
REG::Ux: Copy,
162181
{
163182
/// Modifies the contents of the register by reading and then writing it.
164183
///
@@ -180,7 +199,7 @@ where
180199
#[inline(always)]
181200
pub fn modify<F>(&self, f: F)
182201
where
183-
for<'w> F: FnOnce(&R<U, Self>, &'w mut W<U, Self>) -> &'w mut W<U, Self>,
202+
for<'w> F: FnOnce(&R<REG::Ux, Self>, &'w mut W<REG::Ux, Self>) -> &'w mut W<REG::Ux, Self>,
184203
{
185204
let bits = self.register.get();
186205
self.register.set(
@@ -260,13 +279,13 @@ impl<FI> R<bool, FI> {
260279
/// Register writer.
261280
///
262281
/// Used as an argument to the closures in the `write` and `modify` methods of the register.
263-
pub struct W<U, REG> {
282+
pub struct W<U, T> {
264283
///Writable bits
265284
pub(crate) bits: U,
266-
_reg: marker::PhantomData<REG>,
285+
_reg: marker::PhantomData<T>,
267286
}
268287

269-
impl<U, REG> W<U, REG> {
288+
impl<U, T> W<U, T> {
270289
/// Writes raw bits to the register.
271290
#[inline(always)]
272291
pub unsafe fn bits(&mut self, bits: U) -> &mut Self {

src/generate/register.rs

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -71,7 +71,7 @@ pub fn render(
7171
let doc = format!("Register {} `reset()`'s with value {}", register.name, &rv);
7272
mod_items.extend(quote! {
7373
#[doc = #doc]
74-
impl crate::ResetValue for super::#name_pc {
74+
impl crate::ResettableRegister for super::#u_name_pc {
7575
#[inline(always)]
7676
fn reset_value() -> Self::Ux { #rv }
7777
}
@@ -152,11 +152,15 @@ pub fn render(
152152
}
153153
out.extend(quote! {
154154
#[doc = #doc]
155-
pub type #name_pc = crate::Reg<#rty, #u_name_pc>;
155+
pub type #name_pc = crate::Reg<#u_name_pc>;
156156

157157
#[allow(missing_docs)]
158158
#[doc(hidden)]
159159
pub struct #u_name_pc;
160+
161+
impl crate::Register for #u_name_pc {
162+
type Ux = #rty;
163+
}
160164
});
161165

162166
if can_read {
@@ -166,7 +170,7 @@ pub fn render(
166170
);
167171
out.extend(quote! {
168172
#[doc = #doc]
169-
impl crate::Readable for #name_pc {}
173+
impl crate::ReadableRegister for #u_name_pc {}
170174
});
171175
}
172176
if can_write {
@@ -176,7 +180,7 @@ pub fn render(
176180
);
177181
out.extend(quote! {
178182
#[doc = #doc]
179-
impl crate::Writable for #name_pc {}
183+
impl crate::WritableRegister for #u_name_pc {}
180184
});
181185
}
182186

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