Switch to tock-registers: Documentation and misc updates

Author: andre-richter

02_runtime_init/README.md

@@ -40,14 +40,15 @@ diff -uNr 01_wait_forever/Cargo.toml 02_runtime_init/Cargo.toml
  authors = ["Andre Richter <andre.o.richter@gmail.com>"]
  edition = "2018"
 
-@@ -21,3 +21,7 @@
+@@ -21,3 +21,8 @@
  ##--------------------------------------------------------------------------------------------------
 
  [dependencies]
 +
 +# Platform specific dependencies
 +[target.'cfg(target_arch = "aarch64")'.dependencies]
-+cortex-a = { version = "5.x.x" }
++cortex-a = { version = "6.x.x" }
++
 
 diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile
 --- 01_wait_forever/Makefile

05_drivers_gpio_uart/README.md

@@ -126,8 +126,8 @@ diff -uNr 04_safe_globals/Cargo.toml 05_drivers_gpio_uart/Cargo.toml
  default = []
 -bsp_rpi3 = []
 -bsp_rpi4 = []
-+bsp_rpi3 = ["register"]
-+bsp_rpi4 = ["register"]
++bsp_rpi3 = ["tock-registers"]
++bsp_rpi4 = ["tock-registers"]
 
  [[bin]]
  name = "kernel"
@@ -136,11 +136,11 @@ diff -uNr 04_safe_globals/Cargo.toml 05_drivers_gpio_uart/Cargo.toml
  [dependencies]
 
 +# Optional dependencies
-+register = { version = "1.x.x", optional = true }
++tock-registers = { version = "0.7.x", default-features = false, features = ["register_types"], optional = true }
 +
  # Platform specific dependencies
  [target.'cfg(target_arch = "aarch64")'.dependencies]
- cortex-a = { version = "5.x.x" }
+ cortex-a = { version = "6.x.x" }
 
 diff -uNr 04_safe_globals/Makefile 05_drivers_gpio_uart/Makefile
 --- 04_safe_globals/Makefile
@@ -220,7 +220,7 @@ diff -uNr 04_safe_globals/src/_arch/aarch64/cpu.rs 05_drivers_gpio_uart/src/_arc
 diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 --- 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 +++ 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
-@@ -0,0 +1,221 @@
+@@ -0,0 +1,225 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -231,7 +231,11 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 05_drivers_g
 +    bsp::device_driver::common::MMIODerefWrapper, driver, synchronization,
 +    synchronization::NullLock,
 +};
-+use register::{mmio::*, register_bitfields, register_structs};
++use tock_registers::{
++    interfaces::{ReadWriteable, Writeable},
++    register_bitfields, register_structs,
++    registers::ReadWrite,
++};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions
@@ -446,7 +450,7 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 05_drivers_g
 diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -0,0 +1,403 @@
+@@ -0,0 +1,408 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -463,7 +467,11 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 05_dri
 +    synchronization::NullLock,
 +};
 +use core::fmt;
-+use register::{mmio::*, register_bitfields, register_structs};
++use tock_registers::{
++    interfaces::{Readable, Writeable},
++    register_bitfields, register_structs,
++    registers::{ReadOnly, ReadWrite, WriteOnly},
++};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions
@@ -530,6 +538,7 @@ diff -uNr 04_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 05_dri
 +    LCR_H [
 +        /// Word length. These bits indicate the number of data bits transmitted or received in a
 +        /// frame.
++        #[allow(clippy::enum_variant_names)]
 +        WLEN OFFSET(5) NUMBITS(2) [
 +            FiveBit = 0b00,
 +            SixBit = 0b01,

06_uart_chainloader/README.md

@@ -279,7 +279,7 @@ diff -uNr 05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s 06_uart_chainloader/
 diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 --- 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 +++ 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
-@@ -144,7 +144,7 @@
+@@ -148,7 +148,7 @@
          // Make an educated guess for a good delay value (Sequence described in the BCM2837
          // peripherals PDF).
          //
@@ -292,7 +292,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 06_uart
 diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -279,7 +279,7 @@
+@@ -284,7 +284,7 @@
      }
 
      /// Retrieve a character.
@@ -301,7 +301,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 0
          // If RX FIFO is empty,
          if self.registers.FR.matches_all(FR::RXFE::SET) {
              // immediately return in non-blocking mode.
-@@ -294,12 +294,7 @@
+@@ -299,12 +299,7 @@
          }
 
          // Read one character.
@@ -315,7 +315,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 0
 
          // Update statistics.
          self.chars_read += 1;
-@@ -379,14 +374,14 @@
+@@ -384,14 +379,14 @@
  impl console::interface::Read for PL011Uart {
      fn read_char(&self) -> char {
          self.inner

06_uart_chainloader/demo_payload_rpi3.img

@@ -221,7 +221,7 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/cpu.rs 07_timestamps/src/_arch/a
 diff -uNr 06_uart_chainloader/src/_arch/aarch64/time.rs 07_timestamps/src/_arch/aarch64/time.rs
 --- 06_uart_chainloader/src/_arch/aarch64/time.rs
 +++ 07_timestamps/src/_arch/aarch64/time.rs
-@@ -0,0 +1,118 @@
+@@ -0,0 +1,119 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -237,7 +237,8 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/time.rs 07_timestamps/src/_arch/
 +
 +use crate::{time, warn};
 +use core::time::Duration;
-+use cortex_a::{barrier, regs::*};
++use cortex_a::{asm::barrier, registers::*};
++use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions
@@ -344,7 +345,7 @@ diff -uNr 06_uart_chainloader/src/_arch/aarch64/time.rs 07_timestamps/src/_arch/
 diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 --- 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
 +++ 07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs
-@@ -139,25 +139,19 @@
+@@ -143,25 +143,19 @@
      /// Disable pull-up/down on pins 14 and 15.
      #[cfg(feature = "bsp_rpi3")]
      fn disable_pud_14_15_bcm2837(&mut self) {
@@ -380,7 +381,7 @@ diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 07_times
 diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 --- 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
 +++ 07_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
-@@ -279,7 +279,7 @@
+@@ -284,7 +284,7 @@
      }
 
      /// Retrieve a character.
@@ -389,7 +390,7 @@ diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 07
          // If RX FIFO is empty,
          if self.registers.FR.matches_all(FR::RXFE::SET) {
              // immediately return in non-blocking mode.
-@@ -294,7 +294,12 @@
+@@ -299,7 +299,12 @@
          }
 
          // Read one character.
@@ -403,7 +404,7 @@ diff -uNr 06_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 07
 
          // Update statistics.
          self.chars_read += 1;
-@@ -374,14 +379,14 @@
+@@ -379,14 +384,14 @@
  impl console::interface::Read for PL011Uart {
      fn read_char(&self) -> char {
          self.inner

06_uart_chainloader/demo_payload_rpi4.img

@@ -211,11 +211,12 @@ diff -uNr 08_hw_debug_JTAG/Cargo.toml 09_privilege_level/Cargo.toml
 diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 09_privilege_level/src/_arch/aarch64/cpu/boot.rs
 --- 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs
 +++ 09_privilege_level/src/_arch/aarch64/cpu/boot.rs
-@@ -11,17 +11,67 @@
+@@ -11,17 +11,68 @@
  //!
  //! crate::cpu::boot::arch_boot
 
-+use cortex_a::{asm, regs::*};
++use cortex_a::{asm, registers::*};
++use tock_registers::interfaces::Writeable;
 +
  // Assembly counterpart to this file.
  global_asm!(include_str!("boot.s"));
@@ -323,7 +324,7 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s 09_privilege_level/src/_
 diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs 09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
 --- 08_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs
 +++ 09_privilege_level/src/_arch/aarch64/exception/asynchronous.rs
-@@ -0,0 +1,81 @@
+@@ -0,0 +1,82 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -337,14 +338,15 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs 09_privil
 +//!
 +//! crate::exception::asynchronous::arch_asynchronous
 +
-+use cortex_a::regs::*;
++use cortex_a::registers::*;
++use tock_registers::interfaces::Readable;
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions
 +//--------------------------------------------------------------------------------------------------
 +
 +trait DaifField {
-+    fn daif_field() -> register::Field<u64, DAIF::Register>;
++    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register>;
 +}
 +
 +struct Debug;
@@ -357,25 +359,25 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs 09_privil
 +//--------------------------------------------------------------------------------------------------
 +
 +impl DaifField for Debug {
-+    fn daif_field() -> register::Field<u64, DAIF::Register> {
++    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
 +        DAIF::D
 +    }
 +}
 +
 +impl DaifField for SError {
-+    fn daif_field() -> register::Field<u64, DAIF::Register> {
++    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
 +        DAIF::A
 +    }
 +}
 +
 +impl DaifField for IRQ {
-+    fn daif_field() -> register::Field<u64, DAIF::Register> {
++    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
 +        DAIF::I
 +    }
 +}
 +
 +impl DaifField for FIQ {
-+    fn daif_field() -> register::Field<u64, DAIF::Register> {
++    fn daif_field() -> tock_registers::fields::Field<u64, DAIF::Register> {
 +        DAIF::F
 +    }
 +}
@@ -409,7 +411,7 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/exception/asynchronous.rs 09_privil
 diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/exception.rs 09_privilege_level/src/_arch/aarch64/exception.rs
 --- 08_hw_debug_JTAG/src/_arch/aarch64/exception.rs
 +++ 09_privilege_level/src/_arch/aarch64/exception.rs
-@@ -0,0 +1,30 @@
+@@ -0,0 +1,31 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -423,7 +425,8 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/exception.rs 09_privilege_level/src
 +//!
 +//! crate::exception::arch_exception
 +
-+use cortex_a::regs::*;
++use cortex_a::registers::*;
++use tock_registers::interfaces::Readable;
 +
 +//--------------------------------------------------------------------------------------------------
 +// Public Code

07_timestamps/README.md

@@ -364,7 +364,7 @@ diff -uNr 09_privilege_level/Cargo.toml 10_virtual_mem_part1_identity_mapping/Ca
 diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
 --- 09_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs
 +++ 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu/translation_table.rs
-@@ -0,0 +1,288 @@
+@@ -0,0 +1,292 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
@@ -388,7 +388,11 @@ diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 1
 +    },
 +};
 +use core::convert;
-+use register::{register_bitfields, InMemoryRegister};
++use tock_registers::{
++    interfaces::{Readable, Writeable},
++    register_bitfields,
++    registers::InMemoryRegister,
++};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions
@@ -549,7 +553,7 @@ diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 1
 +
 +/// Convert the kernel's generic memory attributes to HW-specific attributes of the MMU.
 +impl convert::From<AttributeFields>
-+    for register::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
++    for tock_registers::fields::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
 +{
 +    fn from(attribute_fields: AttributeFields) -> Self {
 +        // Memory attributes.
@@ -657,7 +661,7 @@ diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu/translation_table.rs 1
 diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu.rs 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
 --- 09_privilege_level/src/_arch/aarch64/memory/mmu.rs
 +++ 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/memory/mmu.rs
-@@ -0,0 +1,164 @@
+@@ -0,0 +1,165 @@
 +// SPDX-License-Identifier: MIT OR Apache-2.0
 +//
 +// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@@ -678,7 +682,8 @@ diff -uNr 09_privilege_level/src/_arch/aarch64/memory/mmu.rs 10_virtual_mem_part
 +    memory::mmu::{translation_table::KernelTranslationTable, TranslationGranule},
 +};
 +use core::intrinsics::unlikely;
-+use cortex_a::{barrier, regs::*};
++use cortex_a::{asm::barrier, registers::*};
++use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 +
 +//--------------------------------------------------------------------------------------------------
 +// Private Definitions

09_privilege_level/README.md

@@ -492,14 +492,18 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/Cargo.toml 11_exceptions_part1_g
 diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
 --- 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs
 +++ 11_exceptions_part1_groundwork/src/_arch/aarch64/exception.rs
-@@ -11,7 +11,224 @@
+@@ -11,8 +11,227 @@
  //!
  //! crate::exception::arch_exception
 
--use cortex_a::regs::*;
+-use cortex_a::registers::*;
+-use tock_registers::interfaces::Readable;
 +use core::{cell::UnsafeCell, fmt};
-+use cortex_a::{asm, barrier, regs::*};
-+use register::InMemoryRegister;
++use cortex_a::{asm, asm::barrier, registers::*};
++use tock_registers::{
++    interfaces::{Readable, Writeable},
++    registers::InMemoryRegister,
++};
 +
 +// Assembly counterpart to this file.
 +global_asm!(include_str!("exception.s"));
@@ -718,7 +722,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/exception.rs 1
 
  //--------------------------------------------------------------------------------------------------
  // Public Code
-@@ -28,3 +245,23 @@
+@@ -29,3 +248,23 @@
          _ => (PrivilegeLevel::Unknown, "Unknown"),
      }
  }