From 2a8a214cab18529c39bb693a5967ff991880e5d7 Mon Sep 17 00:00:00 2001 From: Arardeth Date: Wed, 24 Jun 2026 17:23:25 +0300 Subject: [PATCH] overlays: Add support for Sixfab M1M PCIe Gen3 AI HAT+ Add device tree overlay to configure PCIe link speed to Gen3 and enable hardware status for the Sixfab M1M HAT+. Signed-off-by: Arardeth --- arch/arm/boot/dts/overlays/Makefile | 1 + arch/arm/boot/dts/overlays/README | 6 ++++++ arch/arm/boot/dts/overlays/sixfab_m1m-overlay.dts | 13 +++++++++++++ 3 files changed, 20 insertions(+) create mode 100644 arch/arm/boot/dts/overlays/sixfab_m1m-overlay.dts diff --git a/arch/arm/boot/dts/overlays/Makefile b/arch/arm/boot/dts/overlays/Makefile index ea5a30939dca43..6c8467188d28c1 100644 --- a/arch/arm/boot/dts/overlays/Makefile +++ b/arch/arm/boot/dts/overlays/Makefile @@ -269,6 +269,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ seeed-can-fd-hat-v2.dtbo \ sh1106-spi.dtbo \ si446x-spi0.dtbo \ + sixfab_m1m.dtbo \ smi.dtbo \ smi-dev.dtbo \ smi-nand.dtbo \ diff --git a/arch/arm/boot/dts/overlays/README b/arch/arm/boot/dts/overlays/README index f74f49cb30fb3c..17c608e1e9cf59 100644 --- a/arch/arm/boot/dts/overlays/README +++ b/arch/arm/boot/dts/overlays/README @@ -4822,6 +4822,12 @@ Params: speed SPI bus speed (default 4000000) reset_pin GPIO pin for RESET (default 27) +Name: sixfab_m1m +Info: Overlay for the Sixfab M1M PCIe Gen3 AI HAT+ +Load: dtoverlay=sixfab_m1m +Params: + + Name: smi Info: Enables the Secondary Memory Interface peripheral. Uses GPIOs 2-25! Load: dtoverlay=smi diff --git a/arch/arm/boot/dts/overlays/sixfab_m1m-overlay.dts b/arch/arm/boot/dts/overlays/sixfab_m1m-overlay.dts new file mode 100644 index 00000000000000..bb25571ff970ad --- /dev/null +++ b/arch/arm/boot/dts/overlays/sixfab_m1m-overlay.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0-only +/dts-v1/; +/plugin/; +/ { + compatible = "brcm,bcm2712"; + fragment@0 { + target = <&pciex1>; + __overlay__ { + status = "okay"; + max-link-speed = <3>; + }; + }; +};