From 65318c0d92805687136167b6ced40fd7ca93b1ac Mon Sep 17 00:00:00 2001 From: Rafal Witczak Date: Wed, 21 Apr 2021 23:36:04 +0200 Subject: [PATCH 1/3] Add Crystal Oscillator module --- .github/workflows/crystal-oscillator.yml | 37 ++ crystal-oscillator/config.kibot.yaml | 119 ++++ .../crystal-oscillator-cache.lib | 125 ++++ .../crystal-oscillator.kicad_pcb | 581 ++++++++++++++++++ ...Header_1x01_P2.54mm_Vertical-GND.kicad_mod | 36 ++ crystal-oscillator/crystal-oscillator.pro | 248 ++++++++ crystal-oscillator/crystal-oscillator.sch | 191 ++++++ crystal-oscillator/fp-lib-table | 3 + 8 files changed, 1340 insertions(+) create mode 100644 .github/workflows/crystal-oscillator.yml create mode 100644 crystal-oscillator/config.kibot.yaml create mode 100644 crystal-oscillator/crystal-oscillator-cache.lib create mode 100644 crystal-oscillator/crystal-oscillator.kicad_pcb create mode 100644 crystal-oscillator/crystal-oscillator.pretty/PinHeader_1x01_P2.54mm_Vertical-GND.kicad_mod create mode 100644 crystal-oscillator/crystal-oscillator.pro create mode 100644 crystal-oscillator/crystal-oscillator.sch create mode 100644 crystal-oscillator/fp-lib-table diff --git a/.github/workflows/crystal-oscillator.yml b/.github/workflows/crystal-oscillator.yml new file mode 100644 index 0000000..34cbfdc --- /dev/null +++ b/.github/workflows/crystal-oscillator.yml @@ -0,0 +1,37 @@ +name: crystal-oscillator + +on: + push: + branches: + - master + paths: + - 'crystal-oscillator/**' + pull_request: + branches: + - master + paths: + - 'crystal-oscillator/**' + +jobs: + kibot: + runs-on: ubuntu-latest + steps: + - uses: actions/checkout@v2 + - uses: INTI-CMNB/KiBot@v0.9.0 + with: + config: crystal-oscillator/config.kibot.yaml + dir: crystal-oscillator + schema: 'crystal-oscillator/esp-prog-adapter.sch' + board: 'crystal-oscillator/esp-prog-adapter.kicad_pcb' + + - name: upload docs + uses: actions/upload-artifact@v2 + with: + name: crystal-oscillator-docs + path: crystal-oscillator/output/docs/ + + - name: upload PCBWay gerbers + uses: actions/upload-artifact@v2 + with: + name: crystal-oscillator-pcbway + path: crystal-oscillator/output/gerbers/pcbway \ No newline at end of file diff --git a/crystal-oscillator/config.kibot.yaml b/crystal-oscillator/config.kibot.yaml new file mode 100644 index 0000000..ed2c43e --- /dev/null +++ b/crystal-oscillator/config.kibot.yaml @@ -0,0 +1,119 @@ +kibot: + version: 1 + +preflight: + run_erc: true + update_xml: true + run_drc: true + check_zone_fills: true + ignore_unconnected: false + +outputs: + + - name: pcb_2d_top + comment: 2D model of PCB + type: pcbdraw + dir: output/docs/render + options: + bottom: false + show_components: all + libs: + - default + - pcbdraw + + - name: pcb_2d_bottom + comment: 2D model of PCB + type: pcbdraw + dir: output/docs/render + options: + bottom: true + show_components: all + libs: + - default + - pcbdraw + + - name: gerbers_pcbway + comment: Gerbers with names compatible with KiCad + type: gerber + dir: output/gerbers/pcbway + options: &gerber_options + exclude_edge_layer: true + exclude_pads_from_silkscreen: true + plot_sheet_reference: false + plot_footprint_refs: true + plot_footprint_values: true + force_plot_invisible_refs_vals: false + tent_vias: true + use_protel_extensions: true + create_gerber_job_file: false + output: "%f-%i%v.%x" + gerber_precision: 4.6 + use_gerber_x2_attributes: false + use_gerber_net_attributes: false + disable_aperture_macros: true + line_width: 0.1 + subtract_mask_from_silk: false + inner_extension_pattern: '.gl%N' + layers: + - copper + - F.SilkS + - B.SilkS + - F.Mask + - B.Mask + - F.Paste + - B.Paste + - Edge.Cuts + + - name: drill_pcbway + comment: Drill files + type: excellon + dir: output/gerbers/pcbway + options: + metric_units: false + minimal_header: true + zeros_format: SUPPRESS_LEADING + left_digits: 3 + right_digits: 3 + pth_and_npth_single_file: false + pth_id: '' + npth_id: '-NPTH' + output: "%f%i.drl" + + - name: bom + comment: Bill of Materials + type: bom + dir: output/docs + options: + format: HTML + html: + title: Crystal Oscillator - Bill of Materials + col_colors: false + logo: false + + - name: sch_pdf + comment: Schematic PDF print + type: pdf_sch_print + dir: output/docs + + - name: pcb_pdf + comment: PCB PDF print + type: pdf_pcb_print + dir: output/docs + layers: all + + + - name: sch_svg + comment: Schematic SVG print + type: svg_sch_print + dir: output/docs/svg/schematic + + - name: pcb_svg + comment: PCB SVG print + type: svg + dir: output/docs/svg/pcb + layers: all + + - name: pcb_3d + comment: 3D model of PCB + type: step + dir: output/docs/render \ No newline at end of file diff --git a/crystal-oscillator/crystal-oscillator-cache.lib b/crystal-oscillator/crystal-oscillator-cache.lib new file mode 100644 index 0000000..bcb9b59 --- /dev/null +++ b/crystal-oscillator/crystal-oscillator-cache.lib @@ -0,0 +1,125 @@ +EESchema-LIBRARY Version 2.4 +#encoding utf-8 +# +# Connector_Generic_Conn_01x01 +# +DEF Connector_Generic_Conn_01x01 J 0 40 Y N 1 F N +F0 "J" 0 100 50 H V C CNN +F1 "Connector_Generic_Conn_01x01" 0 -100 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + Connector*:*_1x??_* +$ENDFPLIST +DRAW +S -50 5 0 -5 1 1 6 N +S -50 50 50 -50 1 1 10 f +X Pin_1 1 -200 0 150 R 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Connector_Generic_Conn_01x02 +# +DEF Connector_Generic_Conn_01x02 J 0 40 Y N 1 F N +F0 "J" 0 100 50 H V C CNN +F1 "Connector_Generic_Conn_01x02" 0 -200 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + Connector*:*_1x??_* +$ENDFPLIST +DRAW +S -50 -95 0 -105 1 1 6 N +S -50 5 0 -5 1 1 6 N +S -50 50 50 -150 1 1 10 f +X Pin_1 1 -200 0 150 R 50 50 1 1 P +X Pin_2 2 -200 -100 150 R 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Device_C +# +DEF Device_C C 0 10 N Y 1 F N +F0 "C" 25 100 50 H V L CNN +F1 "Device_C" 25 -100 50 H V L CNN +F2 "" 38 -150 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + C_* +$ENDFPLIST +DRAW +P 2 0 1 20 -80 -30 80 -30 N +P 2 0 1 20 -80 30 80 30 N +X ~ 1 0 150 110 D 50 50 1 1 P +X ~ 2 0 -150 110 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Device_Crystal_GND3 +# +DEF Device_Crystal_GND3 Y 0 40 Y N 1 F N +F0 "Y" 0 225 50 H V C CNN +F1 "Device_Crystal_GND3" 0 150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + Crystal* +$ENDFPLIST +DRAW +S -45 100 45 -100 0 1 12 N +P 2 0 1 0 -100 0 -75 0 N +P 2 0 1 20 -75 -50 -75 50 N +P 2 0 1 0 0 -150 0 -140 N +P 2 0 1 0 75 0 100 0 N +P 2 0 1 20 75 50 75 -50 N +P 4 0 1 0 -100 -90 -100 -140 100 -140 100 -90 N +X 1 1 -150 0 50 R 50 50 1 1 P +X 2 2 150 0 50 L 50 50 1 1 P +X 3 3 0 -200 50 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Device_R +# +DEF Device_R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "Device_R" 0 0 50 V V C CNN +F2 "" -70 0 50 V I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + R_* +$ENDFPLIST +DRAW +S -40 -100 40 100 0 1 10 N +X ~ 1 0 150 50 D 50 50 1 1 P +X ~ 2 0 -150 50 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# power_GND +# +DEF power_GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "power_GND" 0 -150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# power_PWR_FLAG +# +DEF power_PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 75 50 H I C CNN +F1 "power_PWR_FLAG" 0 150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N +X pwr 1 0 0 0 U 50 50 0 0 w +ENDDRAW +ENDDEF +# +#End Library diff --git a/crystal-oscillator/crystal-oscillator.kicad_pcb b/crystal-oscillator/crystal-oscillator.kicad_pcb new file mode 100644 index 0000000..1077608 --- /dev/null +++ b/crystal-oscillator/crystal-oscillator.kicad_pcb @@ -0,0 +1,581 @@ +(kicad_pcb (version 20171130) (host pcbnew "(5.1.5)-3") + + (general + (thickness 1.6) + (drawings 16) + (tracks 15) + (zones 0) + (modules 7) + (nets 4) + ) + + (page A4) + (layers + (0 F.Cu signal) + (31 B.Cu signal) + (32 B.Adhes user) + (33 F.Adhes user) + (34 B.Paste user) + (35 F.Paste user) + (36 B.SilkS user) + (37 F.SilkS user) + (38 B.Mask user) + (39 F.Mask user) + (40 Dwgs.User user) + (41 Cmts.User user) + (42 Eco1.User user) + (43 Eco2.User user) + (44 Edge.Cuts user) + (45 Margin user) + (46 B.CrtYd user) + (47 F.CrtYd user) + (48 B.Fab user) + (49 F.Fab user) + ) + + (setup + (last_trace_width 0.4) + (trace_clearance 0.3) + (zone_clearance 0.508) + (zone_45_only no) + (trace_min 0.2) + (via_size 0.8) + (via_drill 0.4) + (via_min_size 0.4) + (via_min_drill 0.3) + (uvia_size 0.3) + (uvia_drill 0.1) + (uvias_allowed no) + (uvia_min_size 0.2) + (uvia_min_drill 0.1) + (edge_width 0.05) + (segment_width 0.2) + (pcb_text_width 0.3) + (pcb_text_size 1.5 1.5) + (mod_edge_width 0.12) + (mod_text_size 0.7 0.7) + (mod_text_width 0.12) + (pad_size 2 6.5) + (pad_drill 0) + (pad_to_mask_clearance 0.051) + (solder_mask_min_width 0.25) + (aux_axis_origin 0 0) + (grid_origin 135.89 94.615) + (visible_elements 7FFFFF7F) + (pcbplotparams + (layerselection 0x010fc_ffffffff) + (usegerberextensions false) + (usegerberattributes false) + (usegerberadvancedattributes false) + (creategerberjobfile false) + (excludeedgelayer true) + (linewidth 0.100000) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotinvisibletext false) + (padsonsilk false) + (subtractmaskfromsilk true) + (outputformat 1) + (mirror false) + (drillshape 0) + (scaleselection 1) + (outputdirectory "gerbers")) + ) + + (net 0 "") + (net 1 GND) + (net 2 /XTAL_1) + (net 3 /XTAL_2) + + (net_class Default "This is the default net class." + (clearance 0.3) + (trace_width 0.4) + (via_dia 0.8) + (via_drill 0.4) + (uvia_dia 0.3) + (uvia_drill 0.1) + (add_net /XTAL_1) + (add_net /XTAL_2) + (add_net GND) + ) + + (module Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal (layer B.Cu) (tedit 60808C39) (tstamp 607F3B9A) + (at 143.51 95.25) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /607EE554) + (fp_text reference R1 (at 3.81 -2.54) (layer B.SilkS) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value R (at 3.81 -2.37) (layer B.Fab) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text user %R (at 3.81 0) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start 8.67 1.5) (end -1.05 1.5) (layer B.CrtYd) (width 0.05)) + (fp_line (start 8.67 -1.5) (end 8.67 1.5) (layer B.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.5) (end 8.67 -1.5) (layer B.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.5) (end -1.05 -1.5) (layer B.CrtYd) (width 0.05)) + (fp_line (start 7.08 -1.37) (end 7.08 -1.04) (layer B.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.37) (end 7.08 -1.37) (layer B.SilkS) (width 0.12)) + (fp_line (start 0.54 -1.04) (end 0.54 -1.37) (layer B.SilkS) (width 0.12)) + (fp_line (start 7.08 1.37) (end 7.08 1.04) (layer B.SilkS) (width 0.12)) + (fp_line (start 0.54 1.37) (end 7.08 1.37) (layer B.SilkS) (width 0.12)) + (fp_line (start 0.54 1.04) (end 0.54 1.37) (layer B.SilkS) (width 0.12)) + (fp_line (start 7.62 0) (end 6.96 0) (layer B.Fab) (width 0.1)) + (fp_line (start 0 0) (end 0.66 0) (layer B.Fab) (width 0.1)) + (fp_line (start 6.96 1.25) (end 0.66 1.25) (layer B.Fab) (width 0.1)) + (fp_line (start 6.96 -1.25) (end 6.96 1.25) (layer B.Fab) (width 0.1)) + (fp_line (start 0.66 -1.25) (end 6.96 -1.25) (layer B.Fab) (width 0.1)) + (fp_line (start 0.66 1.25) (end 0.66 -1.25) (layer B.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 7.62 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 3 /XTAL_2)) + (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 /XTAL_1)) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Crystal:Crystal_C26-LF_D2.1mm_L6.5mm_Horizontal_1EP_style1 (layer F.Cu) (tedit 607F32B7) (tstamp 607F0533) + (at 146.37 85.09) + (descr "Crystal THT C26-LF 6.5mm length 2.06mm diameter") + (tags ['C26-LF']) + (path /607EA52D) + (fp_text reference Y1 (at 0.95 9.56 180) (layer F.SilkS) + (effects (font (size 0.7 0.7) (thickness 0.12))) + ) + (fp_text value Crystal_GND3 (at 0.95 11.465 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 2.8 -0.8) (end -0.9 -0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.8 9.3) (end 2.8 -0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.9 9.3) (end 2.8 9.3) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.9 -0.8) (end -0.9 9.3) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.9 0.9) (end 1.9 0.7) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.3 1.8) (end 1.9 0.9) (layer F.SilkS) (width 0.12)) + (fp_line (start 0 0.9) (end 0 0.7) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.6 1.8) (end 0 0.9) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.25 1.8) (end 2.25 2.3) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.35 1.8) (end 2.25 1.8) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.35 2.3) (end -0.35 1.8) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.9 1) (end 1.9 0) (layer F.Fab) (width 0.1)) + (fp_line (start 1.3 2) (end 1.9 1) (layer F.Fab) (width 0.1)) + (fp_line (start 0 1) (end 0 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0.6 2) (end 0 1) (layer F.Fab) (width 0.1)) + (fp_line (start 1.98 2) (end -0.08 2) (layer F.Fab) (width 0.1)) + (fp_line (start 1.98 8.5) (end 1.98 2) (layer F.Fab) (width 0.1)) + (fp_line (start -0.08 8.5) (end 1.98 8.5) (layer F.Fab) (width 0.1)) + (fp_line (start -0.08 2) (end -0.08 8.5) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 1 5.75 90) (layer F.Fab) + (effects (font (size 0.7 0.7) (thickness 0.105))) + ) + (pad NC smd rect (at 0.95 5.75) (size 2 6.5) (layers F.Cu F.Paste F.Mask)) + (pad 2 thru_hole circle (at 1.9 0) (size 1 1) (drill 0.5) (layers *.Cu *.Mask) + (net 3 /XTAL_2)) + (pad 1 thru_hole circle (at 0 0) (size 1 1) (drill 0.5) (layers *.Cu *.Mask) + (net 2 /XTAL_1)) + (pad 3 smd rect (at -0.65 5.715) (size 0.6 1) (layers F.Cu F.Paste F.Mask) + (net 1 GND) (zone_connect 2)) + (pad 3 smd rect (at 2.55 5.72) (size 0.6 1) (layers F.Cu F.Paste F.Mask) + (net 1 GND) (zone_connect 2)) + (model ${KISYS3DMOD}/Crystal.3dshapes/Crystal_C26-LF_D2.1mm_L6.5mm_Horizontal_1EP_style1.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical (layer B.Cu) (tedit 607F1EAD) (tstamp 607F04EB) + (at 146.05 81.915 270) + (descr "Through hole straight pin header, 1x02, 2.54mm pitch, single row") + (tags "Through hole pin header THT 1x02 2.54mm single row") + (path /607EAD2B) + (fp_text reference J1 (at 0 2.33 90) (layer B.SilkS) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value Conn_01x02 (at 1.27 -1.27 180) (layer B.Fab) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text user %R (at 0 -1.27 180) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start 1.8 1.8) (end -1.8 1.8) (layer B.CrtYd) (width 0.05)) + (fp_line (start 1.8 -4.35) (end 1.8 1.8) (layer B.CrtYd) (width 0.05)) + (fp_line (start -1.8 -4.35) (end 1.8 -4.35) (layer B.CrtYd) (width 0.05)) + (fp_line (start -1.8 1.8) (end -1.8 -4.35) (layer B.CrtYd) (width 0.05)) + (fp_line (start -1.27 0.635) (end -0.635 1.27) (layer B.Fab) (width 0.1)) + (fp_line (start -1.27 -3.81) (end -1.27 0.635) (layer B.Fab) (width 0.1)) + (fp_line (start 1.27 -3.81) (end -1.27 -3.81) (layer B.Fab) (width 0.1)) + (fp_line (start 1.27 1.27) (end 1.27 -3.81) (layer B.Fab) (width 0.1)) + (fp_line (start -0.635 1.27) (end 1.27 1.27) (layer B.Fab) (width 0.1)) + (pad 2 thru_hole oval (at 0 -2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 3 /XTAL_2)) + (pad 1 thru_hole oval (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 2 /XTAL_1)) + (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x02_P2.54mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module crystal-oscillator:PinHeader_1x01_P2.54mm_Vertical-GND (layer B.Cu) (tedit 607F1848) (tstamp 607F1401) + (at 143.51 92.075 90) + (descr "Through hole straight pin header, 1x01, 2.54mm pitch, single row") + (tags "Through hole pin header THT 1x01 2.54mm single row") + (path /607F839E) + (fp_text reference J3 (at 0 2.33 -90) (layer B.SilkS) hide + (effects (font (size 0.8 0.8) (thickness 0.15)) (justify mirror)) + ) + (fp_text value Conn_01x01 (at 0 -2.33 -90) (layer B.Fab) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start 1.33 1.33) (end 1.33 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 -1.33) (end 1.33 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 -1.33) (end -1.33 1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 1.33) (end 1.33 1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.33 1.33) (end 1.33 -1.33) (layer B.SilkS) (width 0.12)) + (fp_line (start -0.635 1.27) (end 1.27 1.27) (layer B.Fab) (width 0.1)) + (fp_line (start 1.27 1.27) (end 1.27 -1.27) (layer B.Fab) (width 0.1)) + (fp_line (start 1.27 -1.27) (end -1.27 -1.27) (layer B.Fab) (width 0.1)) + (fp_line (start -1.27 -1.27) (end -1.27 0.635) (layer B.Fab) (width 0.1)) + (fp_line (start -1.27 0.635) (end -0.635 1.27) (layer B.Fab) (width 0.1)) + (fp_line (start -1.33 -1.33) (end 1.33 -1.33) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.33 -1.33) (end -1.33 1.33) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.33 1.33) (end 1.33 1.33) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.6 1.6) (end -1.6 -1.6) (layer B.CrtYd) (width 0.05)) + (fp_line (start -1.6 -1.6) (end 1.6 -1.6) (layer B.CrtYd) (width 0.05)) + (fp_line (start 1.6 -1.6) (end 1.6 1.6) (layer B.CrtYd) (width 0.05)) + (fp_line (start 1.6 1.6) (end -1.6 1.6) (layer B.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0 180) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 1 GND)) + (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x01_P2.54mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module crystal-oscillator:PinHeader_1x01_P2.54mm_Vertical-GND (layer B.Cu) (tedit 607F1848) (tstamp 607F0501) + (at 151.13 92.075 90) + (descr "Through hole straight pin header, 1x01, 2.54mm pitch, single row") + (tags "Through hole pin header THT 1x01 2.54mm single row") + (path /607F2E20) + (fp_text reference J2 (at 0 2.33 -90) (layer B.SilkS) hide + (effects (font (size 0.8 0.8) (thickness 0.15)) (justify mirror)) + ) + (fp_text value Conn_01x01 (at 0 -2.33 -90) (layer B.Fab) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start 1.33 1.33) (end 1.33 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 -1.33) (end 1.33 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 -1.33) (end -1.33 1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 1.33) (end 1.33 1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.33 1.33) (end 1.33 -1.33) (layer B.SilkS) (width 0.12)) + (fp_line (start -0.635 1.27) (end 1.27 1.27) (layer B.Fab) (width 0.1)) + (fp_line (start 1.27 1.27) (end 1.27 -1.27) (layer B.Fab) (width 0.1)) + (fp_line (start 1.27 -1.27) (end -1.27 -1.27) (layer B.Fab) (width 0.1)) + (fp_line (start -1.27 -1.27) (end -1.27 0.635) (layer B.Fab) (width 0.1)) + (fp_line (start -1.27 0.635) (end -0.635 1.27) (layer B.Fab) (width 0.1)) + (fp_line (start -1.33 -1.33) (end 1.33 -1.33) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.33 -1.33) (end -1.33 1.33) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.33 1.33) (end 1.33 1.33) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.6 1.6) (end -1.6 -1.6) (layer B.CrtYd) (width 0.05)) + (fp_line (start -1.6 -1.6) (end 1.6 -1.6) (layer B.CrtYd) (width 0.05)) + (fp_line (start 1.6 -1.6) (end 1.6 1.6) (layer B.CrtYd) (width 0.05)) + (fp_line (start 1.6 1.6) (end -1.6 1.6) (layer B.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0 180) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 1 GND)) + (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x01_P2.54mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.4mm_W2.1mm_P2.50mm (layer F.Cu) (tedit 5AE50EF0) (tstamp 607F04D5) + (at 151.13 88.265 90) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3.4*2.1mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3.4mm width 2.1mm Capacitor") + (path /607EDF89) + (fp_text reference C2 (at 3.81 -1.27) (layer F.SilkS) + (effects (font (size 0.7 0.7) (thickness 0.12))) + ) + (fp_text value C (at 1.25 2.3 90) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0 90) (layer F.Fab) + (effects (font (size 0.68 0.68) (thickness 0.102))) + ) + (fp_line (start 3.55 -1.3) (end -1.05 -1.3) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.3) (end 3.55 -1.3) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.3) (end 3.55 1.3) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.3) (end -1.05 1.3) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.07 0.925) (end 3.07 1.17) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.07 -1.17) (end 3.07 -0.925) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.57 0.925) (end -0.57 1.17) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.57 -1.17) (end -0.57 -0.925) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.57 1.17) (end 3.07 1.17) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.57 -1.17) (end 3.07 -1.17) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.95 -1.05) (end -0.45 -1.05) (layer F.Fab) (width 0.1)) + (fp_line (start 2.95 1.05) (end 2.95 -1.05) (layer F.Fab) (width 0.1)) + (fp_line (start -0.45 1.05) (end 2.95 1.05) (layer F.Fab) (width 0.1)) + (fp_line (start -0.45 -1.05) (end -0.45 1.05) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 3 /XTAL_2)) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.4mm_W2.1mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.4mm_W2.1mm_P2.50mm (layer F.Cu) (tedit 5AE50EF0) (tstamp 607F04C0) + (at 143.51 85.725 270) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3.4*2.1mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3.4mm width 2.1mm Capacitor") + (path /607ED4A7) + (fp_text reference C1 (at -1.27 -1.27) (layer F.SilkS) + (effects (font (size 0.7 0.7) (thickness 0.12))) + ) + (fp_text value C (at 1.25 2.3 90) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.143 0 90) (layer F.Fab) + (effects (font (size 0.68 0.68) (thickness 0.102))) + ) + (fp_line (start 3.55 -1.3) (end -1.05 -1.3) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.3) (end 3.55 -1.3) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.3) (end 3.55 1.3) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.3) (end -1.05 1.3) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.07 0.925) (end 3.07 1.17) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.07 -1.17) (end 3.07 -0.925) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.57 0.925) (end -0.57 1.17) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.57 -1.17) (end -0.57 -0.925) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.57 1.17) (end 3.07 1.17) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.57 -1.17) (end 3.07 -1.17) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.95 -1.05) (end -0.45 -1.05) (layer F.Fab) (width 0.1)) + (fp_line (start 2.95 1.05) (end 2.95 -1.05) (layer F.Fab) (width 0.1)) + (fp_line (start -0.45 1.05) (end 2.95 1.05) (layer F.Fab) (width 0.1)) + (fp_line (start -0.45 -1.05) (end -0.45 1.05) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 /XTAL_1)) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.4mm_W2.1mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (gr_line (start 149.86 81.915) (end 149.86 82.55) (layer Edge.Cuts) (width 0.05) (tstamp 6080DA94)) + (gr_line (start 144.78 81.915) (end 144.78 82.55) (layer Edge.Cuts) (width 0.05) (tstamp 6080DA0C)) + (gr_text GND (at 151.13 90.17) (layer F.SilkS) + (effects (font (size 0.7 0.7) (thickness 0.12))) + ) + (gr_text GND (at 143.51 90.17) (layer F.SilkS) + (effects (font (size 0.7 0.7) (thickness 0.12))) + ) + (gr_arc (start 151.13 95.25) (end 151.13 97.155) (angle -90) (layer Edge.Cuts) (width 0.05)) + (gr_arc (start 143.51 95.25) (end 141.605 95.25) (angle -90) (layer Edge.Cuts) (width 0.05)) + (gr_arc (start 142.875 85.725) (end 142.875 84.455) (angle -90) (layer Edge.Cuts) (width 0.05)) + (gr_arc (start 151.765 85.725) (end 153.035 85.725) (angle -90) (layer Edge.Cuts) (width 0.05)) + (gr_arc (start 142.875 82.55) (end 142.875 84.455) (angle -90) (layer Edge.Cuts) (width 0.05) (tstamp 607F1229)) + (gr_arc (start 151.765 82.55) (end 149.86 82.55) (angle -90) (layer Edge.Cuts) (width 0.05)) + (gr_arc (start 146.05 81.915) (end 146.05 80.645) (angle -90) (layer Edge.Cuts) (width 0.05)) + (gr_arc (start 148.59 81.915) (end 149.86 81.915) (angle -90) (layer Edge.Cuts) (width 0.05) (tstamp 607F4F8B)) + (gr_line (start 146.05 80.645) (end 148.59 80.645) (layer Edge.Cuts) (width 0.05) (tstamp 607F10DD)) + (gr_line (start 141.605 95.25) (end 141.605 85.725) (layer Edge.Cuts) (width 0.05)) + (gr_line (start 151.13 97.155) (end 143.51 97.155) (layer Edge.Cuts) (width 0.05)) + (gr_line (start 153.035 85.725) (end 153.035 95.25) (layer Edge.Cuts) (width 0.05)) + + (segment (start 146.37 82.235) (end 146.05 81.915) (width 0.4) (layer F.Cu) (net 2)) + (segment (start 146.37 85.09) (end 146.37 82.235) (width 0.4) (layer F.Cu) (net 2)) + (segment (start 145.735 85.725) (end 146.37 85.09) (width 0.4) (layer F.Cu) (net 2)) + (segment (start 143.51 85.725) (end 145.735 85.725) (width 0.4) (layer F.Cu) (net 2)) + (segment (start 142.710001 94.450001) (end 143.51 95.25) (width 0.4) (layer F.Cu) (net 2)) + (segment (start 142.159999 93.899999) (end 142.710001 94.450001) (width 0.4) (layer F.Cu) (net 2)) + (segment (start 142.159999 87.075001) (end 142.159999 93.899999) (width 0.4) (layer F.Cu) (net 2)) + (segment (start 143.51 85.725) (end 142.159999 87.075001) (width 0.4) (layer F.Cu) (net 2)) + (segment (start 148.27 82.235) (end 148.59 81.915) (width 0.4) (layer F.Cu) (net 3)) + (segment (start 148.27 85.09) (end 148.27 82.235) (width 0.4) (layer F.Cu) (net 3)) + (segment (start 148.945 85.765) (end 148.27 85.09) (width 0.4) (layer F.Cu) (net 3)) + (segment (start 151.13 85.765) (end 148.945 85.765) (width 0.4) (layer F.Cu) (net 3)) + (segment (start 151.13 85.765) (end 152.480001 87.115001) (width 0.4) (layer F.Cu) (net 3)) + (segment (start 152.480001 93.899999) (end 151.13 95.25) (width 0.4) (layer F.Cu) (net 3)) + (segment (start 152.480001 87.115001) (end 152.480001 93.899999) (width 0.4) (layer F.Cu) (net 3)) + + (zone (net 1) (net_name GND) (layer B.Cu) (tstamp 6080770A) (hatch edge 0.508) + (connect_pads (clearance 0.508)) + (min_thickness 0.254) + (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508)) + (polygon + (pts + (xy 154.305 80.01) (xy 154.305 97.79) (xy 140.335 97.79) (xy 140.335 80.01) + ) + ) + (filled_polygon + (pts + (xy 147.436525 82.861632) (xy 147.643368 83.068475) (xy 147.886589 83.23099) (xy 148.156842 83.342932) (xy 148.44374 83.4) + (xy 148.73626 83.4) (xy 149.023158 83.342932) (xy 149.293411 83.23099) (xy 149.299067 83.22721) (xy 149.378367 83.483385) + (xy 149.401551 83.538536) (xy 149.423956 83.593992) (xy 149.428283 83.602128) (xy 149.605114 83.929173) (xy 149.63857 83.978774) + (xy 149.67132 84.028821) (xy 149.677145 84.035962) (xy 149.914133 84.322432) (xy 149.956585 84.364588) (xy 149.998431 84.407321) + (xy 150.005532 84.413195) (xy 150.259812 84.620581) (xy 150.215241 84.650363) (xy 150.015363 84.850241) (xy 149.85832 85.085273) + (xy 149.750147 85.346426) (xy 149.695 85.623665) (xy 149.695 85.906335) (xy 149.750147 86.183574) (xy 149.85832 86.444727) + (xy 150.015363 86.679759) (xy 150.215241 86.879637) (xy 150.415869 87.013692) (xy 150.388486 87.028329) (xy 150.316903 87.272298) + (xy 151.13 88.085395) (xy 151.943097 87.272298) (xy 151.871514 87.028329) (xy 151.842659 87.014676) (xy 152.044759 86.879637) + (xy 152.244637 86.679759) (xy 152.375 86.484656) (xy 152.375 87.539069) (xy 152.366671 87.523486) (xy 152.122702 87.451903) + (xy 151.309605 88.265) (xy 152.122702 89.078097) (xy 152.366671 89.006514) (xy 152.375 88.988911) (xy 152.375001 90.727706) + (xy 152.334494 90.694463) (xy 152.22418 90.635498) (xy 152.104482 90.599188) (xy 151.98 90.586928) (xy 151.41575 90.59) + (xy 151.257 90.74875) (xy 151.257 91.948) (xy 151.277 91.948) (xy 151.277 92.202) (xy 151.257 92.202) + (xy 151.257 93.40125) (xy 151.41575 93.56) (xy 151.98 93.563072) (xy 152.104482 93.550812) (xy 152.22418 93.514502) + (xy 152.334494 93.455537) (xy 152.375001 93.422294) (xy 152.375001 94.530345) (xy 152.244637 94.335241) (xy 152.044759 94.135363) + (xy 151.809727 93.97832) (xy 151.548574 93.870147) (xy 151.271335 93.815) (xy 150.988665 93.815) (xy 150.711426 93.870147) + (xy 150.450273 93.97832) (xy 150.215241 94.135363) (xy 150.015363 94.335241) (xy 149.85832 94.570273) (xy 149.750147 94.831426) + (xy 149.695 95.108665) (xy 149.695 95.391335) (xy 149.750147 95.668574) (xy 149.85832 95.929727) (xy 150.015363 96.164759) + (xy 150.215241 96.364637) (xy 150.410343 96.495) (xy 143.542277 96.495) (xy 143.440288 96.485) (xy 143.631637 96.485) + (xy 143.870236 96.43754) (xy 144.094992 96.344443) (xy 144.297267 96.209287) (xy 144.469287 96.037267) (xy 144.604443 95.834992) + (xy 144.69754 95.610236) (xy 144.745 95.371637) (xy 144.745 95.128363) (xy 144.69754 94.889764) (xy 144.604443 94.665008) + (xy 144.469287 94.462733) (xy 144.297267 94.290713) (xy 144.094992 94.155557) (xy 143.870236 94.06246) (xy 143.631637 94.015) + (xy 143.388363 94.015) (xy 143.149764 94.06246) (xy 142.925008 94.155557) (xy 142.722733 94.290713) (xy 142.550713 94.462733) + (xy 142.415557 94.665008) (xy 142.32246 94.889764) (xy 142.275 95.128363) (xy 142.275 95.323419) (xy 142.265 95.228276) + (xy 142.265 93.422295) (xy 142.305506 93.455537) (xy 142.41582 93.514502) (xy 142.535518 93.550812) (xy 142.66 93.563072) + (xy 143.22425 93.56) (xy 143.383 93.40125) (xy 143.383 92.202) (xy 143.637 92.202) (xy 143.637 93.40125) + (xy 143.79575 93.56) (xy 144.36 93.563072) (xy 144.484482 93.550812) (xy 144.60418 93.514502) (xy 144.714494 93.455537) + (xy 144.811185 93.376185) (xy 144.890537 93.279494) (xy 144.949502 93.16918) (xy 144.985812 93.049482) (xy 144.998072 92.925) + (xy 149.641928 92.925) (xy 149.654188 93.049482) (xy 149.690498 93.16918) (xy 149.749463 93.279494) (xy 149.828815 93.376185) + (xy 149.925506 93.455537) (xy 150.03582 93.514502) (xy 150.155518 93.550812) (xy 150.28 93.563072) (xy 150.84425 93.56) + (xy 151.003 93.40125) (xy 151.003 92.202) (xy 149.80375 92.202) (xy 149.645 92.36075) (xy 149.641928 92.925) + (xy 144.998072 92.925) (xy 144.995 92.36075) (xy 144.83625 92.202) (xy 143.637 92.202) (xy 143.383 92.202) + (xy 143.363 92.202) (xy 143.363 91.948) (xy 143.383 91.948) (xy 143.383 90.74875) (xy 143.637 90.74875) + (xy 143.637 91.948) (xy 144.83625 91.948) (xy 144.995 91.78925) (xy 144.998072 91.225) (xy 149.641928 91.225) + (xy 149.645 91.78925) (xy 149.80375 91.948) (xy 151.003 91.948) (xy 151.003 90.74875) (xy 150.84425 90.59) + (xy 150.28 90.586928) (xy 150.155518 90.599188) (xy 150.03582 90.635498) (xy 149.925506 90.694463) (xy 149.828815 90.773815) + (xy 149.749463 90.870506) (xy 149.690498 90.98082) (xy 149.654188 91.100518) (xy 149.641928 91.225) (xy 144.998072 91.225) + (xy 144.985812 91.100518) (xy 144.949502 90.98082) (xy 144.890537 90.870506) (xy 144.811185 90.773815) (xy 144.714494 90.694463) + (xy 144.60418 90.635498) (xy 144.484482 90.599188) (xy 144.36 90.586928) (xy 143.79575 90.59) (xy 143.637 90.74875) + (xy 143.383 90.74875) (xy 143.22425 90.59) (xy 142.66 90.586928) (xy 142.535518 90.599188) (xy 142.41582 90.635498) + (xy 142.305506 90.694463) (xy 142.265 90.727705) (xy 142.265 89.217702) (xy 142.696903 89.217702) (xy 142.768486 89.461671) + (xy 143.023996 89.582571) (xy 143.298184 89.6513) (xy 143.580512 89.665217) (xy 143.86013 89.623787) (xy 144.126292 89.528603) + (xy 144.251514 89.461671) (xy 144.31136 89.257702) (xy 150.316903 89.257702) (xy 150.388486 89.501671) (xy 150.643996 89.622571) + (xy 150.918184 89.6913) (xy 151.200512 89.705217) (xy 151.48013 89.663787) (xy 151.746292 89.568603) (xy 151.871514 89.501671) + (xy 151.943097 89.257702) (xy 151.13 88.444605) (xy 150.316903 89.257702) (xy 144.31136 89.257702) (xy 144.323097 89.217702) + (xy 143.51 88.404605) (xy 142.696903 89.217702) (xy 142.265 89.217702) (xy 142.265 88.950931) (xy 142.273329 88.966514) + (xy 142.517298 89.038097) (xy 143.330395 88.225) (xy 143.689605 88.225) (xy 144.502702 89.038097) (xy 144.746671 88.966514) + (xy 144.867571 88.711004) (xy 144.9363 88.436816) (xy 144.941293 88.335512) (xy 149.689783 88.335512) (xy 149.731213 88.61513) + (xy 149.826397 88.881292) (xy 149.893329 89.006514) (xy 150.137298 89.078097) (xy 150.950395 88.265) (xy 150.137298 87.451903) + (xy 149.893329 87.523486) (xy 149.772429 87.778996) (xy 149.7037 88.053184) (xy 149.689783 88.335512) (xy 144.941293 88.335512) + (xy 144.950217 88.154488) (xy 144.908787 87.87487) (xy 144.813603 87.608708) (xy 144.746671 87.483486) (xy 144.502702 87.411903) + (xy 143.689605 88.225) (xy 143.330395 88.225) (xy 142.517298 87.411903) (xy 142.273329 87.483486) (xy 142.265 87.501089) + (xy 142.265 86.444657) (xy 142.395363 86.639759) (xy 142.595241 86.839637) (xy 142.795869 86.973692) (xy 142.768486 86.988329) + (xy 142.696903 87.232298) (xy 143.51 88.045395) (xy 144.323097 87.232298) (xy 144.251514 86.988329) (xy 144.222659 86.974676) + (xy 144.424759 86.839637) (xy 144.624637 86.639759) (xy 144.78168 86.404727) (xy 144.889853 86.143574) (xy 144.945 85.866335) + (xy 144.945 85.583665) (xy 144.889853 85.306426) (xy 144.78168 85.045273) (xy 144.736872 84.978212) (xy 145.235 84.978212) + (xy 145.235 85.201788) (xy 145.278617 85.421067) (xy 145.364176 85.627624) (xy 145.488388 85.81352) (xy 145.64648 85.971612) + (xy 145.832376 86.095824) (xy 146.038933 86.181383) (xy 146.258212 86.225) (xy 146.481788 86.225) (xy 146.701067 86.181383) + (xy 146.907624 86.095824) (xy 147.09352 85.971612) (xy 147.251612 85.81352) (xy 147.32 85.71117) (xy 147.388388 85.81352) + (xy 147.54648 85.971612) (xy 147.732376 86.095824) (xy 147.938933 86.181383) (xy 148.158212 86.225) (xy 148.381788 86.225) + (xy 148.601067 86.181383) (xy 148.807624 86.095824) (xy 148.99352 85.971612) (xy 149.151612 85.81352) (xy 149.275824 85.627624) + (xy 149.361383 85.421067) (xy 149.405 85.201788) (xy 149.405 84.978212) (xy 149.361383 84.758933) (xy 149.275824 84.552376) + (xy 149.151612 84.36648) (xy 148.99352 84.208388) (xy 148.807624 84.084176) (xy 148.601067 83.998617) (xy 148.381788 83.955) + (xy 148.158212 83.955) (xy 147.938933 83.998617) (xy 147.732376 84.084176) (xy 147.54648 84.208388) (xy 147.388388 84.36648) + (xy 147.32 84.46883) (xy 147.251612 84.36648) (xy 147.09352 84.208388) (xy 146.907624 84.084176) (xy 146.701067 83.998617) + (xy 146.481788 83.955) (xy 146.258212 83.955) (xy 146.038933 83.998617) (xy 145.832376 84.084176) (xy 145.64648 84.208388) + (xy 145.488388 84.36648) (xy 145.364176 84.552376) (xy 145.278617 84.758933) (xy 145.235 84.978212) (xy 144.736872 84.978212) + (xy 144.624637 84.810241) (xy 144.424759 84.610363) (xy 144.407851 84.599065) (xy 144.647432 84.400867) (xy 144.689588 84.358415) + (xy 144.732321 84.316569) (xy 144.738195 84.309468) (xy 144.973178 84.021351) (xy 145.006283 83.971524) (xy 145.040078 83.922168) + (xy 145.044461 83.914062) (xy 145.219006 83.58579) (xy 145.241799 83.530489) (xy 145.265366 83.475504) (xy 145.268091 83.466701) + (xy 145.340488 83.226913) (xy 145.346589 83.23099) (xy 145.616842 83.342932) (xy 145.90374 83.4) (xy 146.19626 83.4) + (xy 146.483158 83.342932) (xy 146.753411 83.23099) (xy 146.996632 83.068475) (xy 147.203475 82.861632) (xy 147.32 82.68724) + ) + ) + ) + (zone (net 1) (net_name GND) (layer F.Cu) (tstamp 60807707) (hatch edge 0.508) + (connect_pads (clearance 0.508)) + (min_thickness 0.254) + (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508)) + (polygon + (pts + (xy 153.035 97.155) (xy 141.605 97.155) (xy 141.605 80.645) (xy 153.035 80.645) + ) + ) + (filled_polygon + (pts + (xy 147.388388 85.81352) (xy 147.54648 85.971612) (xy 147.732376 86.095824) (xy 147.938933 86.181383) (xy 148.158212 86.225) + (xy 148.224132 86.225) (xy 148.325558 86.326426) (xy 148.351709 86.358291) (xy 148.408292 86.404727) (xy 148.478854 86.462636) + (xy 148.623913 86.540172) (xy 148.781311 86.587918) (xy 148.944999 86.60404) (xy 148.986018 86.6) (xy 149.96207 86.6) + (xy 150.015363 86.679759) (xy 150.215241 86.879637) (xy 150.415869 87.013692) (xy 150.388486 87.028329) (xy 150.316903 87.272298) + (xy 151.13 88.085395) (xy 151.144143 88.071253) (xy 151.323748 88.250858) (xy 151.309605 88.265) (xy 151.323748 88.279143) + (xy 151.144143 88.458748) (xy 151.13 88.444605) (xy 150.316903 89.257702) (xy 150.388486 89.501671) (xy 150.643996 89.622571) + (xy 150.918184 89.6913) (xy 151.200512 89.705217) (xy 151.48013 89.663787) (xy 151.645001 89.604826) (xy 151.645002 90.588752) + (xy 151.41575 90.59) (xy 151.257 90.74875) (xy 151.257 91.948) (xy 151.277 91.948) (xy 151.277 92.202) + (xy 151.257 92.202) (xy 151.257 93.40125) (xy 151.41575 93.56) (xy 151.637922 93.56121) (xy 151.365417 93.833714) + (xy 151.271335 93.815) (xy 150.988665 93.815) (xy 150.711426 93.870147) (xy 150.450273 93.97832) (xy 150.215241 94.135363) + (xy 150.015363 94.335241) (xy 149.85832 94.570273) (xy 149.750147 94.831426) (xy 149.695 95.108665) (xy 149.695 95.391335) + (xy 149.750147 95.668574) (xy 149.85832 95.929727) (xy 150.015363 96.164759) (xy 150.215241 96.364637) (xy 150.410343 96.495) + (xy 143.542277 96.495) (xy 143.440288 96.485) (xy 143.631637 96.485) (xy 143.870236 96.43754) (xy 144.094992 96.344443) + (xy 144.297267 96.209287) (xy 144.469287 96.037267) (xy 144.604443 95.834992) (xy 144.69754 95.610236) (xy 144.745 95.371637) + (xy 144.745 95.128363) (xy 144.69754 94.889764) (xy 144.604443 94.665008) (xy 144.469287 94.462733) (xy 144.297267 94.290713) + (xy 144.094992 94.155557) (xy 143.870236 94.06246) (xy 143.631637 94.015) (xy 143.455867 94.015) (xy 143.002077 93.56121) + (xy 143.22425 93.56) (xy 143.383 93.40125) (xy 143.383 92.202) (xy 143.637 92.202) (xy 143.637 93.40125) + (xy 143.79575 93.56) (xy 144.36 93.563072) (xy 144.484482 93.550812) (xy 144.60418 93.514502) (xy 144.714494 93.455537) + (xy 144.811185 93.376185) (xy 144.890537 93.279494) (xy 144.949502 93.16918) (xy 144.985812 93.049482) (xy 144.998072 92.925) + (xy 144.995 92.36075) (xy 144.83625 92.202) (xy 143.637 92.202) (xy 143.383 92.202) (xy 143.363 92.202) + (xy 143.363 91.948) (xy 143.383 91.948) (xy 143.383 90.74875) (xy 143.637 90.74875) (xy 143.637 91.948) + (xy 144.83625 91.948) (xy 144.995 91.78925) (xy 144.998072 91.225) (xy 144.985812 91.100518) (xy 144.949502 90.98082) + (xy 144.890537 90.870506) (xy 144.811185 90.773815) (xy 144.714494 90.694463) (xy 144.60418 90.635498) (xy 144.484482 90.599188) + (xy 144.36 90.586928) (xy 143.79575 90.59) (xy 143.637 90.74875) (xy 143.383 90.74875) (xy 143.22425 90.59) + (xy 142.994999 90.588752) (xy 142.994999 89.56885) (xy 143.023996 89.582571) (xy 143.298184 89.6513) (xy 143.580512 89.665217) + (xy 143.86013 89.623787) (xy 144.126292 89.528603) (xy 144.251514 89.461671) (xy 144.323097 89.217702) (xy 143.51 88.404605) + (xy 143.495858 88.418748) (xy 143.316253 88.239143) (xy 143.330395 88.225) (xy 143.689605 88.225) (xy 144.502702 89.038097) + (xy 144.746671 88.966514) (xy 144.867571 88.711004) (xy 144.9363 88.436816) (xy 144.950217 88.154488) (xy 144.908787 87.87487) + (xy 144.813603 87.608708) (xy 144.803604 87.59) (xy 145.681928 87.59) (xy 145.681928 94.09) (xy 145.694188 94.214482) + (xy 145.730498 94.33418) (xy 145.789463 94.444494) (xy 145.868815 94.541185) (xy 145.965506 94.620537) (xy 146.07582 94.679502) + (xy 146.195518 94.715812) (xy 146.32 94.728072) (xy 148.32 94.728072) (xy 148.444482 94.715812) (xy 148.56418 94.679502) + (xy 148.674494 94.620537) (xy 148.771185 94.541185) (xy 148.850537 94.444494) (xy 148.909502 94.33418) (xy 148.945812 94.214482) + (xy 148.958072 94.09) (xy 148.958072 92.925) (xy 149.641928 92.925) (xy 149.654188 93.049482) (xy 149.690498 93.16918) + (xy 149.749463 93.279494) (xy 149.828815 93.376185) (xy 149.925506 93.455537) (xy 150.03582 93.514502) (xy 150.155518 93.550812) + (xy 150.28 93.563072) (xy 150.84425 93.56) (xy 151.003 93.40125) (xy 151.003 92.202) (xy 149.80375 92.202) + (xy 149.645 92.36075) (xy 149.641928 92.925) (xy 148.958072 92.925) (xy 148.958072 91.225) (xy 149.641928 91.225) + (xy 149.645 91.78925) (xy 149.80375 91.948) (xy 151.003 91.948) (xy 151.003 90.74875) (xy 150.84425 90.59) + (xy 150.28 90.586928) (xy 150.155518 90.599188) (xy 150.03582 90.635498) (xy 149.925506 90.694463) (xy 149.828815 90.773815) + (xy 149.749463 90.870506) (xy 149.690498 90.98082) (xy 149.654188 91.100518) (xy 149.641928 91.225) (xy 148.958072 91.225) + (xy 148.958072 88.335512) (xy 149.689783 88.335512) (xy 149.731213 88.61513) (xy 149.826397 88.881292) (xy 149.893329 89.006514) + (xy 150.137298 89.078097) (xy 150.950395 88.265) (xy 150.137298 87.451903) (xy 149.893329 87.523486) (xy 149.772429 87.778996) + (xy 149.7037 88.053184) (xy 149.689783 88.335512) (xy 148.958072 88.335512) (xy 148.958072 87.59) (xy 148.945812 87.465518) + (xy 148.909502 87.34582) (xy 148.850537 87.235506) (xy 148.771185 87.138815) (xy 148.674494 87.059463) (xy 148.56418 87.000498) + (xy 148.444482 86.964188) (xy 148.32 86.951928) (xy 146.32 86.951928) (xy 146.195518 86.964188) (xy 146.07582 87.000498) + (xy 145.965506 87.059463) (xy 145.868815 87.138815) (xy 145.789463 87.235506) (xy 145.730498 87.34582) (xy 145.694188 87.465518) + (xy 145.681928 87.59) (xy 144.803604 87.59) (xy 144.746671 87.483486) (xy 144.502702 87.411903) (xy 143.689605 88.225) + (xy 143.330395 88.225) (xy 143.316253 88.210858) (xy 143.495858 88.031253) (xy 143.51 88.045395) (xy 144.323097 87.232298) + (xy 144.251514 86.988329) (xy 144.222659 86.974676) (xy 144.424759 86.839637) (xy 144.624637 86.639759) (xy 144.67793 86.56) + (xy 145.693982 86.56) (xy 145.735 86.56404) (xy 145.776018 86.56) (xy 145.776019 86.56) (xy 145.898689 86.547918) + (xy 146.056087 86.500172) (xy 146.201146 86.422636) (xy 146.328291 86.318291) (xy 146.354445 86.286422) (xy 146.415867 86.225) + (xy 146.481788 86.225) (xy 146.701067 86.181383) (xy 146.907624 86.095824) (xy 147.09352 85.971612) (xy 147.251612 85.81352) + (xy 147.32 85.71117) + ) + ) + ) +) diff --git a/crystal-oscillator/crystal-oscillator.pretty/PinHeader_1x01_P2.54mm_Vertical-GND.kicad_mod b/crystal-oscillator/crystal-oscillator.pretty/PinHeader_1x01_P2.54mm_Vertical-GND.kicad_mod new file mode 100644 index 0000000..9ec353a --- /dev/null +++ b/crystal-oscillator/crystal-oscillator.pretty/PinHeader_1x01_P2.54mm_Vertical-GND.kicad_mod @@ -0,0 +1,36 @@ +(module PinHeader_1x01_P2.54mm_Vertical-GND (layer F.Cu) (tedit 607F1848) + (descr "Through hole straight pin header, 1x01, 2.54mm pitch, single row") + (tags "Through hole pin header THT 1x01 2.54mm single row") + (fp_text reference J3 (at 0 -2.33 180) (layer F.SilkS) hide + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value Conn_01x01 (at 0 2.33 180) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0 0 -270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.6 -1.6) (end -1.6 -1.6) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.6 1.6) (end 1.6 -1.6) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.6 1.6) (end 1.6 1.6) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.6 -1.6) (end -1.6 1.6) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.33 -1.33) (end 1.33 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 1.33) (end -1.33 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 1.33) (end 1.33 1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start -1.27 1.27) (end -1.27 -0.635) (layer F.Fab) (width 0.1)) + (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.Fab) (width 0.1)) + (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 1.33 -1.33) (end 1.33 1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 -1.33) (end 1.33 -1.33) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.33 1.33) (end -1.33 -1.33) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.33 1.33) (end 1.33 1.33) (layer B.SilkS) (width 0.12)) + (fp_line (start 1.33 -1.33) (end 1.33 1.33) (layer B.SilkS) (width 0.12)) + (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) + (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x01_P2.54mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) +) diff --git a/crystal-oscillator/crystal-oscillator.pro b/crystal-oscillator/crystal-oscillator.pro new file mode 100644 index 0000000..24d1cc4 --- /dev/null +++ b/crystal-oscillator/crystal-oscillator.pro @@ -0,0 +1,248 @@ +update=20/04/2021 20:08:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +[schematic_editor] +version=1 +PageLayoutDescrFile= +PlotDirectoryName= +SubpartIdSeparator=0 +SubpartFirstId=65 +NetFmtName= +SpiceAjustPassiveValues=0 +LabSize=50 +ERC_TestSimilarLabels=1 +[pcbnew] +version=1 +PageLayoutDescrFile= +LastNetListRead= +CopperLayerCount=2 +BoardThickness=1.6 +AllowMicroVias=0 +AllowBlindVias=0 +RequireCourtyardDefinitions=0 +ProhibitOverlappingCourtyards=1 +MinTrackWidth=0.2 +MinViaDiameter=0.4 +MinViaDrill=0.3 +MinMicroViaDiameter=0.2 +MinMicroViaDrill=0.09999999999999999 +MinHoleToHole=0.25 +TrackWidth1=0.4 +ViaDiameter1=0.8 +ViaDrill1=0.4 +dPairWidth1=0.2 +dPairGap1=0.25 +dPairViaGap1=0.25 +SilkLineWidth=0.12 +SilkTextSizeV=0.7 +SilkTextSizeH=0.7 +SilkTextSizeThickness=0.12 +SilkTextItalic=0 +SilkTextUpright=1 +CopperLineWidth=0.2 +CopperTextSizeV=1.5 +CopperTextSizeH=1.5 +CopperTextThickness=0.3 +CopperTextItalic=0 +CopperTextUpright=1 +EdgeCutLineWidth=0.05 +CourtyardLineWidth=0.05 +OthersLineWidth=0.15 +OthersTextSizeV=1 +OthersTextSizeH=1 +OthersTextSizeThickness=0.15 +OthersTextItalic=0 +OthersTextUpright=1 +SolderMaskClearance=0.051 +SolderMaskMinWidth=0.25 +SolderPasteClearance=0 +SolderPasteRatio=-0 +[pcbnew/Layer.F.Cu] +Name=F.Cu +Type=0 +Enabled=1 +[pcbnew/Layer.In1.Cu] +Name=In1.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In2.Cu] +Name=In2.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In3.Cu] +Name=In3.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In4.Cu] +Name=In4.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In5.Cu] +Name=In5.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In6.Cu] +Name=In6.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In7.Cu] +Name=In7.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In8.Cu] +Name=In8.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In9.Cu] +Name=In9.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In10.Cu] +Name=In10.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In11.Cu] +Name=In11.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In12.Cu] +Name=In12.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In13.Cu] +Name=In13.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In14.Cu] +Name=In14.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In15.Cu] +Name=In15.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In16.Cu] +Name=In16.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In17.Cu] +Name=In17.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In18.Cu] +Name=In18.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In19.Cu] +Name=In19.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In20.Cu] +Name=In20.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In21.Cu] +Name=In21.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In22.Cu] +Name=In22.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In23.Cu] +Name=In23.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In24.Cu] +Name=In24.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In25.Cu] +Name=In25.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In26.Cu] +Name=In26.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In27.Cu] +Name=In27.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In28.Cu] +Name=In28.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In29.Cu] +Name=In29.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In30.Cu] +Name=In30.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.B.Cu] +Name=B.Cu +Type=0 +Enabled=1 +[pcbnew/Layer.B.Adhes] +Enabled=1 +[pcbnew/Layer.F.Adhes] +Enabled=1 +[pcbnew/Layer.B.Paste] +Enabled=1 +[pcbnew/Layer.F.Paste] +Enabled=1 +[pcbnew/Layer.B.SilkS] +Enabled=1 +[pcbnew/Layer.F.SilkS] +Enabled=1 +[pcbnew/Layer.B.Mask] +Enabled=1 +[pcbnew/Layer.F.Mask] +Enabled=1 +[pcbnew/Layer.Dwgs.User] +Enabled=1 +[pcbnew/Layer.Cmts.User] +Enabled=1 +[pcbnew/Layer.Eco1.User] +Enabled=1 +[pcbnew/Layer.Eco2.User] +Enabled=1 +[pcbnew/Layer.Edge.Cuts] +Enabled=1 +[pcbnew/Layer.Margin] +Enabled=1 +[pcbnew/Layer.B.CrtYd] +Enabled=1 +[pcbnew/Layer.F.CrtYd] +Enabled=1 +[pcbnew/Layer.B.Fab] +Enabled=1 +[pcbnew/Layer.F.Fab] +Enabled=1 +[pcbnew/Layer.Rescue] +Enabled=0 +[pcbnew/Netclasses] +[pcbnew/Netclasses/Default] +Name=Default +Clearance=0.3 +TrackWidth=0.4 +ViaDiameter=0.8 +ViaDrill=0.4 +uViaDiameter=0.3 +uViaDrill=0.1 +dPairWidth=0.2 +dPairGap=0.25 +dPairViaGap=0.25 diff --git a/crystal-oscillator/crystal-oscillator.sch b/crystal-oscillator/crystal-oscillator.sch new file mode 100644 index 0000000..806596f --- /dev/null +++ b/crystal-oscillator/crystal-oscillator.sch @@ -0,0 +1,191 @@ +EESchema Schematic File Version 4 +EELAYER 30 0 +EELAYER END +$Descr User 8268 5886 +encoding utf-8 +Sheet 1 1 +Title "Crystal Oscillator module" +Date "2021-04-21" +Rev "1" +Comp "" +Comment1 "" +Comment2 "Bias resistor may be soldered when needed in given project." +Comment3 "Capacitors may be selected according to needs." +Comment4 "Crystal oscillator module with crystal, capacitors and optional bias resistor." +$EndDescr +$Comp +L Device:Crystal_GND3 Y1 +U 1 1 607EA52D +P 2750 2500 +F 0 "Y1" V 2750 2650 50 0000 L CNN +F 1 "Crystal_GND3" V 2750 2650 50 0001 L CNN +F 2 "Crystal:Crystal_C26-LF_D2.1mm_L6.5mm_Horizontal_1EP_style1" H 2750 2500 50 0001 C CNN +F 3 "~" H 2750 2500 50 0001 C CNN + 1 2750 2500 + 0 -1 1 0 +$EndComp +$Comp +L Device:C C2 +U 1 1 607EDF89 +P 3500 2750 +F 0 "C2" H 3600 2700 50 0000 L CNN +F 1 "C" H 3650 2750 50 0001 L CNN +F 2 "Capacitor_THT:C_Disc_D3.4mm_W2.1mm_P2.50mm" H 3538 2600 50 0001 C CNN +F 3 "~" H 3500 2750 50 0001 C CNN + 1 3500 2750 + 1 0 0 -1 +$EndComp +$Comp +L Device:R R1 +U 1 1 607EE554 +P 2000 2500 +F 0 "R1" H 2100 2500 50 0000 L CNN +F 1 "R" H 2100 2500 50 0001 L CNN +F 2 "Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal" V 1930 2500 50 0001 C CNN +F 3 "~" H 2000 2500 50 0001 C CNN + 1 2000 2500 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3500 2900 3500 3000 +Wire Wire Line + 2950 2500 3500 2500 +Wire Wire Line + 3500 2500 3500 2400 +Wire Wire Line + 3500 2500 3500 2600 +Connection ~ 3500 2500 +Wire Wire Line + 3500 2000 2750 2000 +Wire Wire Line + 2750 2000 2750 2350 +Wire Wire Line + 2750 2650 2750 3000 +Wire Wire Line + 2750 3000 3500 3000 +$Comp +L power:GND #PWR0101 +U 1 1 607F0DA9 +P 3900 3300 +F 0 "#PWR0101" H 3900 3050 50 0001 C CNN +F 1 "GND" H 3950 3150 50 0000 R CNN +F 2 "" H 3900 3300 50 0001 C CNN +F 3 "" H 3900 3300 50 0001 C CNN + 1 3900 3300 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2750 2000 2000 2000 +Connection ~ 2750 2000 +Connection ~ 2750 3000 +Text Label 1500 2000 0 50 ~ 0 +XTAL_1 +Text Label 1500 3000 0 50 ~ 0 +XTAL_2 +Wire Wire Line + 3900 2500 3900 3300 +Wire Wire Line + 3500 2500 3900 2500 +$Comp +L power:GND #PWR0102 +U 1 1 607F34F6 +P 5500 3300 +F 0 "#PWR0102" H 5500 3050 50 0001 C CNN +F 1 "GND" H 5500 3150 50 0000 R CNN +F 2 "" H 5500 3300 50 0001 C CNN +F 3 "" H 5500 3300 50 0001 C CNN + 1 5500 3300 + -1 0 0 -1 +$EndComp +Wire Wire Line + 5500 2750 5500 3300 +$Comp +L Connector_Generic:Conn_01x01 J3 +U 1 1 607F839E +P 6000 2750 +F 0 "J3" H 6150 2750 50 0000 C CNN +F 1 "Conn_01x01" H 6300 2850 50 0000 C CNN +F 2 "crystal-oscillator:PinHeader_1x01_P2.54mm_Vertical-GND" H 6000 2750 50 0001 C CNN +F 3 "~" H 6000 2750 50 0001 C CNN + 1 6000 2750 + 1 0 0 1 +$EndComp +Wire Wire Line + 5800 2750 5500 2750 +Wire Wire Line + 5500 2600 5450 2600 +Connection ~ 5500 2750 +$Comp +L Connector_Generic:Conn_01x01 J2 +U 1 1 607F2E20 +P 6000 2500 +F 0 "J2" H 6150 2450 50 0000 C CNN +F 1 "Conn_01x01" H 6300 2550 50 0000 C CNN +F 2 "crystal-oscillator:PinHeader_1x01_P2.54mm_Vertical-GND" H 6000 2500 50 0001 C CNN +F 3 "~" H 6000 2500 50 0001 C CNN + 1 6000 2500 + 1 0 0 1 +$EndComp +Wire Wire Line + 5000 2150 5800 2150 +Text Label 5000 2150 0 50 ~ 0 +XTAL_2 +Text Label 5000 2050 0 50 ~ 0 +XTAL_1 +$Comp +L Connector_Generic:Conn_01x02 J1 +U 1 1 607EAD2B +P 6000 2050 +F 0 "J1" H 6150 2050 50 0000 C CNN +F 1 "Conn_01x02" H 6300 1950 50 0000 C CNN +F 2 "Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical" H 6000 2050 50 0001 C CNN +F 3 "~" H 6000 2050 50 0001 C CNN + 1 6000 2050 + 1 0 0 -1 +$EndComp +$Comp +L power:PWR_FLAG #FLG0101 +U 1 1 60809FBB +P 5450 2600 +F 0 "#FLG0101" H 5450 2675 50 0001 C CNN +F 1 "PWR_FLAG" V 5350 2650 50 0001 C CNN +F 2 "" H 5450 2600 50 0001 C CNN +F 3 "~" H 5450 2600 50 0001 C CNN + 1 5450 2600 + 0 -1 1 0 +$EndComp +Wire Wire Line + 5500 2600 5500 2750 +Wire Wire Line + 3500 2100 3500 2000 +$Comp +L Device:C C1 +U 1 1 607ED4A7 +P 3500 2250 +F 0 "C1" H 3600 2300 50 0000 L CNN +F 1 "C" H 3600 2300 50 0001 L CNN +F 2 "Capacitor_THT:C_Disc_D3.4mm_W2.1mm_P2.50mm" H 3538 2100 50 0001 C CNN +F 3 "~" H 3500 2250 50 0001 C CNN + 1 3500 2250 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5000 2050 5800 2050 +Wire Wire Line + 5800 2500 5500 2500 +Wire Wire Line + 5500 2500 5500 2600 +Connection ~ 5500 2600 +Wire Wire Line + 1500 3000 2000 3000 +Wire Wire Line + 2000 2350 2000 2000 +Connection ~ 2000 2000 +Wire Wire Line + 2000 2000 1500 2000 +Wire Wire Line + 2000 2650 2000 3000 +Connection ~ 2000 3000 +Wire Wire Line + 2000 3000 2750 3000 +$EndSCHEMATC diff --git a/crystal-oscillator/fp-lib-table b/crystal-oscillator/fp-lib-table new file mode 100644 index 0000000..2940a67 --- /dev/null +++ b/crystal-oscillator/fp-lib-table @@ -0,0 +1,3 @@ +(fp_lib_table + (lib (name crystal-oscillator)(type KiCad)(uri ${KIPRJMOD}/crystal-oscillator.pretty)(options "")(descr "")) +) From cfd26755ad30d9da5568e879f6b31e3f17f0a4c8 Mon Sep 17 00:00:00 2001 From: Rafal Witczak Date: Wed, 21 Apr 2021 23:39:43 +0200 Subject: [PATCH 2/3] Fix CI --- .github/workflows/crystal-oscillator.yml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/.github/workflows/crystal-oscillator.yml b/.github/workflows/crystal-oscillator.yml index 34cbfdc..865d62a 100644 --- a/.github/workflows/crystal-oscillator.yml +++ b/.github/workflows/crystal-oscillator.yml @@ -21,8 +21,8 @@ jobs: with: config: crystal-oscillator/config.kibot.yaml dir: crystal-oscillator - schema: 'crystal-oscillator/esp-prog-adapter.sch' - board: 'crystal-oscillator/esp-prog-adapter.kicad_pcb' + schema: 'crystal-oscillator/crystal-oscillator.sch' + board: 'crystal-oscillator/crystal-oscillator.kicad_pcb' - name: upload docs uses: actions/upload-artifact@v2 From e37b8887d8d5d8f7de0bbd993a1129141283ecfc Mon Sep 17 00:00:00 2001 From: Rafal Witczak Date: Thu, 22 Apr 2021 23:19:31 +0200 Subject: [PATCH 3/3] ci: refactor ci --- .github/workflows/crystal-oscillator.yml | 14 ++- crystal-oscillator/config.kibot.yaml | 113 +---------------------- 2 files changed, 14 insertions(+), 113 deletions(-) diff --git a/.github/workflows/crystal-oscillator.yml b/.github/workflows/crystal-oscillator.yml index 865d62a..cd73320 100644 --- a/.github/workflows/crystal-oscillator.yml +++ b/.github/workflows/crystal-oscillator.yml @@ -17,7 +17,7 @@ jobs: runs-on: ubuntu-latest steps: - uses: actions/checkout@v2 - - uses: INTI-CMNB/KiBot@v0.9.0 + - uses: INTI-CMNB/KiBot@v0.10.1 with: config: crystal-oscillator/config.kibot.yaml dir: crystal-oscillator @@ -30,8 +30,14 @@ jobs: name: crystal-oscillator-docs path: crystal-oscillator/output/docs/ - - name: upload PCBWay gerbers + - name: upload renders uses: actions/upload-artifact@v2 with: - name: crystal-oscillator-pcbway - path: crystal-oscillator/output/gerbers/pcbway \ No newline at end of file + name: crystal-oscillator-renders + path: crystal-oscillator/output/renders/ + + - name: upload gerbers + uses: actions/upload-artifact@v2 + with: + name: crystal-oscillator-gerbers + path: crystal-oscillator/output/gerbers/*.zip \ No newline at end of file diff --git a/crystal-oscillator/config.kibot.yaml b/crystal-oscillator/config.kibot.yaml index ed2c43e..0689eae 100644 --- a/crystal-oscillator/config.kibot.yaml +++ b/crystal-oscillator/config.kibot.yaml @@ -8,112 +8,7 @@ preflight: check_zone_fills: true ignore_unconnected: false -outputs: - - - name: pcb_2d_top - comment: 2D model of PCB - type: pcbdraw - dir: output/docs/render - options: - bottom: false - show_components: all - libs: - - default - - pcbdraw - - - name: pcb_2d_bottom - comment: 2D model of PCB - type: pcbdraw - dir: output/docs/render - options: - bottom: true - show_components: all - libs: - - default - - pcbdraw - - - name: gerbers_pcbway - comment: Gerbers with names compatible with KiCad - type: gerber - dir: output/gerbers/pcbway - options: &gerber_options - exclude_edge_layer: true - exclude_pads_from_silkscreen: true - plot_sheet_reference: false - plot_footprint_refs: true - plot_footprint_values: true - force_plot_invisible_refs_vals: false - tent_vias: true - use_protel_extensions: true - create_gerber_job_file: false - output: "%f-%i%v.%x" - gerber_precision: 4.6 - use_gerber_x2_attributes: false - use_gerber_net_attributes: false - disable_aperture_macros: true - line_width: 0.1 - subtract_mask_from_silk: false - inner_extension_pattern: '.gl%N' - layers: - - copper - - F.SilkS - - B.SilkS - - F.Mask - - B.Mask - - F.Paste - - B.Paste - - Edge.Cuts - - - name: drill_pcbway - comment: Drill files - type: excellon - dir: output/gerbers/pcbway - options: - metric_units: false - minimal_header: true - zeros_format: SUPPRESS_LEADING - left_digits: 3 - right_digits: 3 - pth_and_npth_single_file: false - pth_id: '' - npth_id: '-NPTH' - output: "%f%i.drl" - - - name: bom - comment: Bill of Materials - type: bom - dir: output/docs - options: - format: HTML - html: - title: Crystal Oscillator - Bill of Materials - col_colors: false - logo: false - - - name: sch_pdf - comment: Schematic PDF print - type: pdf_sch_print - dir: output/docs - - - name: pcb_pdf - comment: PCB PDF print - type: pdf_pcb_print - dir: output/docs - layers: all - - - - name: sch_svg - comment: Schematic SVG print - type: svg_sch_print - dir: output/docs/svg/schematic - - - name: pcb_svg - comment: PCB SVG print - type: svg - dir: output/docs/svg/pcb - layers: all - - - name: pcb_3d - comment: 3D model of PCB - type: step - dir: output/docs/render \ No newline at end of file +import: + - ../config/docs.kibot.yaml + - ../config/renders.kibot.yaml + - ../config/manufacturers/PCBWay.kibot.yaml