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Added QDSS STM and TMC support in DEBUG suite
- MultiSource-STM-ETM: validates STM and ETM multi-source trace configuration - Sink-Status-STM-Toggle: tests STM sink status and toggle functionality - STM-HWE-PORT-SWITCH: verifies STM hardware event port switching - STM-Source-Enable-Disable: tests STM source enable/disable via sysfs - Added coresight_common.sh utility for shared functions Signed-off-by: Rohan Dutta <rohadutt@qti.qualcomm.com>
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‎Runner/suites/Kernel/DEBUG/MultiSource-STM-ETM/MultiSource-STM-ETM.yaml‎

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metadata:
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name: MultiSource-STM-ETM
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format: "Lava-Test Test Definition 1.0"
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description: "Validates concurrent STM and ETM trace collection across multiple cores."
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os:
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- linux
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scope:
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- coresight
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- kernel
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run:
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steps:
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- REPO_PATH=$PWD || true
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- cd Runner/suites/Kernel/DEBUG/MultiSource-STM-ETM || true
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- ./run.sh || true
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- $REPO_PATH/Runner/utils/send-to-lava.sh MultiSource-STM-ETM.res || true

‎Runner/suites/Kernel/DEBUG/MultiSource-STM-ETM/README.md‎

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# Multi-Source STM + ETM Test
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## Overview
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This test verifies the Coresight subsystem's ability to handle simultaneous trace data from multiple sources: STM (System Trace Macrocell) for software events, and ETM (Embedded Trace Macrocell) for instruction traces from all online CPUs. It iterates through available sinks (e.g., `tmc_etf0`, `tmc_etr0`) and checks if valid binary data is captured.
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## Test Goals
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- Verify the Coresight subsystem's ability to handle simultaneous trace streams.
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- Validate the functionality of STM (System Trace Macrocell) for generating software event traces.
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- Validate the functionality of ETM (Embedded Trace Macrocell) for instruction tracing across all online CPUs.
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- Ensure that Coresight links and funnels properly multiplex data without dropping critical traces.
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- Verify that valid binary data is successfully captured across different available sinks.
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## Prerequisites
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- Kernel must be built with Coresight support:
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- `CONFIG_CORESIGHT`
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- `CONFIG_CORESIGHT_STM`
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- `CONFIG_CORESIGHT_LINK_AND_SINK_TMC`
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- Availability of the common library: `Runner/utils/coresight_common.sh`
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- Root privileges (to configure Coresight sysfs nodes and read from character devices).
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## Script Location
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`Runner/suites/Kernel/FunctionalArea/coresight/MultiSource-STM-ETM/run.sh`
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## Files
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- `run.sh` - Main test script
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- `MultiSource-STM-ETM.res` - Summary result file with PASS/FAIL
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- `MultiSource-STM-ETM.log` - Full execution log (generated if logging is enabled)
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## How It Works
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1. **Initialization:** Sources common Coresight helper functions (`coresight_common.sh`).
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2. **Setup:** Resets the Coresight topology to ensure a clean state.
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3. **Execution Loop:** Iterates through all available trace sinks (e.g., `tmc_etf0`, `tmc_etr0`).
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- Enables the current sink.
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- Enables STM as a trace source.
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- Enables all available ETMs (for all online CPUs) as trace sources.
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- Triggers trace data generation (both software events and CPU instruction execution).
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4. **Verification:** Reads the captured binary data from the sink and verifies its validity.
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5. **Teardown:** Disables all active sources and the sink before moving to the next iteration.
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## Example Output
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```
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[INFO] 2026-03-16 07:41:58 - -----------------------------------------------------------------------------------------
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[INFO] 2026-03-16 07:41:58 - -------------------Starting MultiSource-STM-ETM Testcase----------------------------
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[INFO] 2026-03-16 07:41:58 - === Test Initialization ===
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[INFO] 2026-03-16 07:41:58 - Checking if required tools are available
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[INFO] 2026-03-16 07:41:58 - Testing Sink: tmc_etf0
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[PASS] 2026-03-16 07:41:58 - Captured 65536 bytes from tmc_etf0
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[INFO] 2026-03-16 07:41:58 - Testing Sink: tmc_etr0
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[PASS] 2026-03-16 07:41:58 - Captured 64 bytes from tmc_etr0
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[INFO] 2026-03-16 07:41:58 - Testing Sink: tmc_etr1
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[PASS] 2026-03-16 07:41:58 - Captured 64 bytes from tmc_etr1
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```
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## Return Code
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- `0` — Simultaneous trace capture succeeded for all tested sinks
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- `1` — Trace capture failed, returned invalid data, or a device failed to enable/disable
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## Integration in CI
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- Can be run standalone or via LAVA
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- Result file MultiSource-STM-ETM.res will be parsed by result_parse.sh
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## Notes
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- Testing multiple sources simultaneously stresses the Coresight funnels and links to ensure they can handle interleaved trace streams without data corruption or system instability.
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## License
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SPDX-License-Identifier: BSD-3-Clause-Clear
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(c) Qualcomm Technologies, Inc. and/or its subsidiaries.

‎Runner/suites/Kernel/DEBUG/MultiSource-STM-ETM/run.sh‎

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#!/bin/sh
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# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
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# SPDX-License-Identifier: BSD-3-Clause
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SCRIPT_DIR="$(cd "$(dirname "$0")" && pwd)"
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INIT_ENV=""
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SEARCH="$SCRIPT_DIR"
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while [ "$SEARCH" != "/" ]; do
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if [ -f "$SEARCH/init_env" ]; then
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INIT_ENV="$SEARCH/init_env"
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break
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fi
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SEARCH=$(dirname "$SEARCH")
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done
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if [ -z "$INIT_ENV" ]; then
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echo "[ERROR] Could not find init_env (starting at $SCRIPT_DIR)" >&2
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exit 1
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fi
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if [ -z "$__INIT_ENV_LOADED" ]; then
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# shellcheck disable=SC1090
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. "$INIT_ENV"
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fi
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# shellcheck disable=SC1090,SC1091
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. "$TOOLS/functestlib.sh"
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# shellcheck disable=SC1090,SC1091
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. "$TOOLS/coresight_common.sh"
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TESTNAME="MultiSource-STM-ETM"
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if command -v find_test_case_by_name >/dev/null 2>&1; then
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test_path=$(find_test_case_by_name "$TESTNAME")
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cd "$test_path" || exit 1
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else
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cd "$SCRIPT_DIR" || exit 1
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fi
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res_file="./$TESTNAME.res"
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log_info "-----------------------------------------------------------------------------------------"
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log_info "-------------------Starting $TESTNAME Testcase----------------------------"
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log_info "=== Test Initialization ==="
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log_info "Checking if required tools are available"
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for tool in timeout stat; do
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if ! command -v "$tool" >/dev/null 2>&1; then
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log_skip "Required tool '$tool' not found. Skipping test."
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echo "$TESTNAME SKIP" > "$res_file"
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exit 0
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fi
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done
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CPU_PATH="/sys/devices/system/cpu/cpu"
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CORES=$(grep -c "processor" /proc/cpuinfo)
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STM_PATH="$CS_BASE/stm0"
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[ ! -d "$STM_PATH" ] && STM_PATH="$CS_BASE/coresight-stm"
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# --- Helpers ---
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toggle_etm_all() {
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_state=$1
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_count=0
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_toggled_count=0
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while [ "$_count" -lt "$CORES" ]; do
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_skip=0
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if [ -f "${CPU_PATH}${_count}/online" ]; then
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read -r _is_online < "${CPU_PATH}${_count}/online"
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if [ "$_is_online" = "0" ]; then
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log_info "CPU $_count is offline, skipping ETM toggle for this core."
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_skip=1
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fi
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fi
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if [ "$_skip" -eq 0 ]; then
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_etm=""
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if [ -f "$CS_BASE/ete$_count/enable_source" ]; then
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_etm="$CS_BASE/ete$_count/enable_source"
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elif [ -f "$CS_BASE/coresight-ete$_count/enable_source" ]; then
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_etm="$CS_BASE/coresight-ete$_count/enable_source"
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elif [ -f "$CS_BASE/etm$_count/enable_source" ]; then
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_etm="$CS_BASE/etm$_count/enable_source"
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elif [ -f "$CS_BASE/coresight-etm$_count/enable_source" ]; then
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_etm="$CS_BASE/coresight-etm$_count/enable_source"
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fi
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if [ -n "$_etm" ]; then
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if echo "$_state" > "$_etm" 2>/dev/null; then
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_toggled_count=$((_toggled_count + 1))
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else
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log_warn "Failed to write $_state to $_etm"
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fi
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else
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log_warn "No ETM/ETE source found for CPU $_count in $CS_BASE"
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fi
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fi
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_count=$((_count + 1))
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done
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if [ "$_toggled_count" -eq 0 ]; then
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log_warn "No ETM/ETE devices were successfully toggled. Please verify Coresight configurations and path names."
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fi
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}
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# --- Preflight ---
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cs_check_base || { echo "$TESTNAME FAIL" > "$res_file"; exit 1; }
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cs_global_reset
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toggle_etm_all 0
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# shellcheck disable=SC2010
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SINKS=""
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for _d in "$CS_BASE"/tmc_et* "$CS_BASE"/coresight-tmc-et*; do
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[ -d "$_d" ] || continue
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_name="${_d##*/}"
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[ "$_name" = "tmc_etf1" ] && continue
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[ -f "$_d/enable_sink" ] || continue
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SINKS="$SINKS $_name"
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done
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SINKS="${SINKS# }"
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if [ -z "$SINKS" ]; then
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log_fail "No suitable TMC sinks found"
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echo "$TESTNAME FAIL" > "$res_file"
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exit 1
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fi
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for sinkname in $SINKS; do
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log_info "Testing Sink: $sinkname"
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cs_global_reset
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OUTPUT_BIN="/tmp/$sinkname.bin"
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rm -f "$OUTPUT_BIN"
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if ! cs_enable_sink "$sinkname"; then
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log_warn "Sink $sinkname enable_sink node not found"
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echo "$TESTNAME FAIL" > "$res_file"
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continue
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fi
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toggle_etm_all 1
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if [ -f "$STM_PATH/enable_source" ]; then
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echo 1 > "$STM_PATH/enable_source"
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else
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log_warn "STM source not found"
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fi
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[ -c "/dev/$sinkname" ] && timeout 2s cat "/dev/$sinkname" > "$OUTPUT_BIN"
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if [ -f "$OUTPUT_BIN" ]; then
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bin_size=$(stat -c%s "$OUTPUT_BIN")
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if [ "$bin_size" -ge 64 ]; then
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log_pass "Captured $bin_size bytes from $sinkname"
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echo "$TESTNAME PASS" > "$res_file"
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else
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log_fail "Captured data too small ($bin_size bytes) from $sinkname"
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echo "$TESTNAME FAIL" > "$res_file"
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fi
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else
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log_fail "No output file generated for $sinkname"
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echo "$TESTNAME FAIL" > "$res_file"
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fi
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toggle_etm_all 0
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done
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cs_global_reset

‎Runner/suites/Kernel/DEBUG/STM-HWE-PORT-SWITCH/README.md‎

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# STM-HWE-PORT-SWITCH Test
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## Overview
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This test verifies that the STM (System Trace Macrocell) attributes `hwevent_enable` and `port_enable` can be successfully toggled (0 and 1) via sysfs, regardless of whether the main STM source (`enable_source`) is currently active or inactive.
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## Test Goals
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- Verify the ability to toggle STM hardware event enabling (`hwevent_enable`).
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- Verify the ability to toggle STM port enabling (`port_enable`).
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- Ensure that these attributes can be modified independently of the main STM source's active state (enabled or disabled).
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- Validate that sysfs reads accurately reflect the values written to these configuration attributes.
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- Ensure proper restoration of default values post-testing.
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## Prerequisites
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- Kernel must be built with Coresight STM support (e.g., `CONFIG_CORESIGHT_STM`).
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- sysfs access to `/sys/bus/coresight/devices/stm0/` (or equivalent STM device path).
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- Access to configfs for STP policy directory creation.
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- Root privileges (to configure attributes, enable sources/sinks, and manage policies).
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## Script Location
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`Runner/suites/Kernel/FunctionalArea/coresight/STM-HWE-PORT-SWITCH/run.sh`
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## Files
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- `run.sh` - Main test script
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- `STM-HWE-PORT-SWITCH.res` - Summary result file with PASS/FAIL
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- `STM-HWE-PORT-SWITCH.log` - Full execution log (generated if logging is enabled)
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## How It Works
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1. **Setup:**
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- Creates STP policy directories.
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- Resets Coresight devices to ensure a clean state.
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- Enables `tmc_etf0` as the trace sink.
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2. **Test Loop (Run for both `hwevent_enable` and `port_enable`):**
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- **Outer Loop:** Toggles the main STM `enable_source` (sets to 0, then 1).
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- **Inner Loop:** Toggles the target attribute (sets to 0, then 1).
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3. **Verification:** Reads back the attribute value to ensure it matches the written value.
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4. **Teardown:**
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- Resets all Coresight devices.
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- Restores `hwevent_enable` to 0.
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- Restores `port_enable` to 0xffffffff (all ports enabled).
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## Example Output
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```
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[INFO] 2026-03-16 09:03:42 - -----------------------------------------------------------------------------------------
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[INFO] 2026-03-16 09:03:42 - -------------------Starting STM-HWE-PORT-SWITCH Testcase----------------------------
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[INFO] 2026-03-16 09:03:42 - Testing Attribute: hwevent_enable
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[PASS] 2026-03-16 09:03:42 - STM_Src:0 | hwevent_enable set to 0
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[PASS] 2026-03-16 09:03:42 - STM_Src:0 | hwevent_enable set to 1
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[PASS] 2026-03-16 09:03:42 - STM_Src:1 | hwevent_enable set to 0
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[PASS] 2026-03-16 09:03:42 - STM_Src:1 | hwevent_enable set to 1
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[INFO] 2026-03-16 09:03:42 - Testing Attribute: port_enable
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[PASS] 2026-03-16 09:03:42 - STM_Src:0 | port_enable set to 0
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[PASS] 2026-03-16 09:03:42 - STM_Src:0 | port_enable set to 1
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[PASS] 2026-03-16 09:03:42 - STM_Src:1 | port_enable set to 0
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[PASS] 2026-03-16 09:03:42 - STM_Src:1 | port_enable set to 1
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## Return Code
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- `0` — All attributes were toggled and verified successfully in all source states
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- `1` — One or more read/write verifications failed
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## Integration in CI
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- Can be run standalone or via LAVA
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- Result file STM-HWE-PORT-SWITCH.res will be parsed by result_parse.sh
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## Notes
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- Ensuring that configuration changes can happen while the main source is active is critical for dynamic trace adjustments without needing to tear down the entire Coresight topology.
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- 0xffffffff represents a bitmask enabling all 32 ports in standard STM configurations.
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## License
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SPDX-License-Identifier: BSD-3-Clause-Clear
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(c) Qualcomm Technologies, Inc. and/or its subsidiaries.

‎Runner/suites/Kernel/DEBUG/STM-HWE-PORT-SWITCH/STM-HWE-PORT-SWITCH.yaml‎

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metadata:
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name: STM-HWEvent-Port-Enable-Disable
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format: "Lava-Test Test Definition 1.0"
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description: "Validates the ability to enable and disable STM Hardware Events and Ports via sysfs."
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os:
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- linux
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scope:
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- coresight
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- kernel
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run:
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steps:
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- REPO_PATH=$PWD || true
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- cd Runner/suites/Kernel/DEBUG/STM-HWE-PORT-SWITCH || true
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- ./run.sh || true
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- $REPO_PATH/Runner/utils/send-to-lava.sh STM-HWE-PORT-SWITCH.res || true

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