FROMLIST: arm64: dts: qcom: sm8450: Fix ICE reg size

The ICE register region size was originally described incorrectly when
the ICE hardware was first introduced. The same value was later carried
over unchanged when the ICE node was split out from the UFS node into
its own DT entry.

Correct the register size to match the hardware specification.

Link: https://lore.kernel.org/linux-arm-msm/20260402-ice_dt_reg_fix-v1-2-74e4c2129238@oss.qualcomm.com/
Fixes: 276ee34 ("arm64: dts: qcom: sm8450: add Inline Crypto Engine registers and clock")
Reviewed-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>
Signed-off-by: Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>

Author: arakshit011

arch/arm64/boot/dts/qcom/sm8450.dtsi

@@ -5348,7 +5348,7 @@
 		ice: crypto@1d88000 {
 			compatible = "qcom,sm8450-inline-crypto-engine",
 				     "qcom,inline-crypto-engine";
-			reg = <0 0x01d88000 0 0x8000>;
+			reg = <0 0x01d88000 0 0x18000>;
 			clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
 				 <&gcc GCC_UFS_PHY_AHB_CLK>;
 			clock-names = "ice_core_clk",