QCLINUX: qcom-dcc: add qcom-dcc dev driver

Create qcom-dcc dev driver for matching the qcom-dcc driver without DT.

Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>

Author: jiegan0107

arch/arm64/configs/qcom_debug.config

@@ -1 +1,2 @@
 CONFIG_QCOM_DCC=m
+CONFIG_QCOM_DCC_DEV=m

drivers/misc/Kconfig

@@ -311,13 +311,19 @@ config QCOM_FASTRPC
 	  module.
 
 config QCOM_DCC
-	tristate "Qualcomm Technologies, Inc. Data Capture and Compare (DCC) engine driver"
+	tristate "Qualcomm Data Capture and Compare (DCC) engine driver"
 	depends on ARCH_QCOM || COMPILE_TEST
 	help
 	  This option enables the driver for the Data Capture and Compare engine. DCC
 	  driver provides interfaces to configure DCC block and read back the captured
 	  data from the DCC's internal SRAM. The module name for this is qcom-dcc.
 
+config QCOM_DCC_DEV
+	tristate "Qualcomm Data Capture and Compare (DCC) engine device instance"
+	depends on QCOM_DCC
+	help
+	  This is the device instance of the QCOM DCC driver.
+
 config SGI_GRU
 	tristate "SGI GRU driver"
 	depends on X86_UV && SMP

drivers/misc/Makefile

@@ -76,3 +76,4 @@ obj-y				+= keba/
 obj-y				+= amd-sbi/
 obj-$(CONFIG_MISC_RP1)		+= rp1/
 obj-$(CONFIG_QCOM_DCC)		+= qcom-dcc.o
+obj-$(CONFIG_QCOM_DCC_DEV)	+= qcom-dcc-dev.o

drivers/misc/qcom-dcc-dev.c

@@ -0,0 +1,116 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/soc/qcom/smem.h>
+#include "qcom-dcc.h"
+
+#define DEV_NAME "qcom-dcc"
+
+static struct platform_device *dcc_pdev;
+
+static const struct dcc_pdata talos_pdata = {
+	.base		= 0x010a2000,
+	.size		= 0x00001000,
+	.ram_base	= 0x010ae000,
+	.ram_size	= 0x00002000,
+	.dcc_offset	= 0x6000,
+	.map_ver	= 0x1,
+};
+
+static const struct dcc_pdata lemans_pdata = {
+	.base		= 0x040ff000,
+	.size		= 0x00001000,
+	.ram_base	= 0x040b8800,
+	.ram_size	= 0x00006000,
+	.dcc_offset	= 0x38800,
+	.map_ver	= 0x3,
+};
+
+static const struct dcc_pdata kodiak_pdata = {
+	.base		= 0x0117f000,
+	.size		= 0x00001000,
+	.ram_base	= 0x01112000,
+	.ram_size	= 0x00006000,
+	.dcc_offset	= 0x12000,
+	.map_ver	= 0x2,
+};
+
+static int __init dcc_dev_init(void)
+{
+	int ret;
+	u32 soc_id;
+
+	dcc_pdev = platform_device_alloc(DEV_NAME, -1);
+	if (!dcc_pdev)
+		return -ENOMEM;
+
+	ret = qcom_smem_get_soc_id(&soc_id);
+	if (ret)
+		goto fail;
+
+	switch(soc_id) {
+	case 475:
+	case 497:
+	case 498:
+	case 515:
+		ret = platform_device_add_data(dcc_pdev, &kodiak_pdata, sizeof(kodiak_pdata));
+		if (ret)
+			goto fail;
+
+		break;
+	case 534:
+	case 606:
+	case 667:
+	case 674:
+	case 675:
+	case 676:
+		ret = platform_device_add_data(dcc_pdev, &lemans_pdata, sizeof(lemans_pdata));
+		if (ret)
+			goto fail;
+
+		break;
+	case 377:
+	case 380:
+	case 384:
+	case 401:
+	case 406:
+	case 680:
+		ret = platform_device_add_data(dcc_pdev, &talos_pdata, sizeof(talos_pdata));
+		if (ret)
+			goto fail;
+
+		break;
+	default:
+		pr_err("DCC: Invalid SoC ID\n");
+		ret = -EINVAL;
+		goto fail;
+	}
+
+	ret = platform_device_add(dcc_pdev);
+	if (ret)
+		goto fail;
+
+	pr_info("DCC platform device has registered\n");
+
+	return 0;
+
+fail:
+	pr_err("Failed to register DCC platform device\n");
+	platform_device_put(dcc_pdev);
+
+	return ret;
+}
+
+static void __exit dcc_dev_exit(void)
+{
+	platform_device_unregister(dcc_pdev);
+}
+
+module_init(dcc_dev_init);
+module_exit(dcc_dev_exit);
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Qualcomm Technologies Inc. DCC driver, device stub");

drivers/misc/qcom-dcc.c

@@ -135,6 +135,8 @@
 #include <linux/slab.h>
 #include <linux/uaccess.h>
 
+#include "qcom-dcc.h"
+
 #define STATUS_READY_TIMEOUT		5000  /* microseconds */
 
 /* DCC registers */
@@ -1423,57 +1425,6 @@ static ssize_t dcc_sram_read(struct file *file, char __user *data,
 	return len;
 }
 
-static void dcc_configure_list(struct dcc_drvdata *drvdata, struct device_node *np)
-{
-	const char *prop;
-	int ret, curr_list, index = 0;
-	char *token, *bufp;
-	char *delim = " ";
-	u32 len, processed_len = 0;
-
-	ret = of_property_read_u32(np, "qcom,curr-link-list",
-                               &curr_list);
-	if (ret)
-		return;
-
-	if(!of_get_property(np, "qcom,link-list", &len))
-		return;
-
-	bufp = kzalloc(len+1, GFP_KERNEL);
-	if (!bufp)
-		return;
-
-	while (!of_property_read_string_index(np, "qcom,link-list", index, &prop)) {
-		strncpy(bufp, prop, strlen(prop));
-		bufp[strlen(prop)] = '\0';
-
-		processed_len += strlen(bufp) + 1;
-
-		token = strsep(&bufp, delim);
-
-		if (!strcmp("R", token)) {
-			ret = dcc_config_add_read(drvdata, bufp, curr_list);
-		} else if (!strcmp("W", token)) {
-			ret = dcc_config_add_write(drvdata, bufp, curr_list);
-		} else if (!strcmp("RW", token)) {
-			ret = dcc_config_add_read_write(drvdata, bufp, curr_list);
-		} else if (!strcmp("L", token)) {
-			ret = dcc_config_add_loop(drvdata, bufp, curr_list);
-		} else {
-			dev_err(drvdata->dev, "%s is not a correct input\n", token);
-			ret = -EINVAL;
-		}
-
-		if (ret < 0)
-			dev_err(drvdata->dev, "Configure line %s failed\n", prop);
-
-		index++;
-	}
-
-	dcc_enable(drvdata, curr_list);
-	kfree(bufp);
-}
-
 static const struct file_operations dcc_sram_fops = {
 	.owner		= THIS_MODULE,
 	.read		= dcc_sram_read,
@@ -1499,7 +1450,7 @@ static int dcc_probe(struct platform_device *pdev)
 	int ret = 0, i;
 	struct device *dev = &pdev->dev;
 	struct dcc_drvdata *drvdata;
-	struct resource *res;
+	const struct dcc_pdata *pdata = dev_get_platdata(dev);
 
 	drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
 	if (!drvdata)
@@ -1508,21 +1459,17 @@ static int dcc_probe(struct platform_device *pdev)
 	drvdata->dev = &pdev->dev;
 	platform_set_drvdata(pdev, drvdata);
 
-	drvdata->base = devm_platform_ioremap_resource(pdev, 0);
+	drvdata->base = devm_ioremap(dev, pdata->base, pdata->size);
 	if (IS_ERR(drvdata->base))
 		return PTR_ERR(drvdata->base);
 
-	drvdata->ram_base = devm_platform_get_and_ioremap_resource(pdev, 1, &res);
+	drvdata->ram_base = devm_ioremap(dev, pdata->ram_base, pdata->ram_size);
 	if (IS_ERR(drvdata->ram_base))
 		return PTR_ERR(drvdata->ram_base);
 
-	drvdata->ram_size = resource_size(res);
-	ret = of_property_read_u32(pdev->dev.of_node, "qcom,dcc-offset",
-				   &drvdata->ram_offset);
-	if (ret)
-		return -EINVAL;
-
-	drvdata->mem_map_ver = (u64)of_device_get_match_data(&pdev->dev);
+	drvdata->ram_size = pdata->ram_size;
+	drvdata->ram_offset = pdata->dcc_offset;
+	drvdata->mem_map_ver = pdata->map_ver;
 
 	switch (drvdata->mem_map_ver) {
 	case MEM_MAP_VER3:
@@ -1573,7 +1520,6 @@ static int dcc_probe(struct platform_device *pdev)
 	}
 
 	dcc_create_debug_dir(drvdata);
-	dcc_configure_list(drvdata, pdev->dev.of_node);
 
 	return 0;
 }
@@ -1587,20 +1533,11 @@ static void dcc_remove(struct platform_device *pdev)
 	dcc_config_reset(drvdata);
 }
 
-static const struct of_device_id dcc_match_table[] = {
-	{ .compatible = "qcom,dcc-v1", .data = (void *)MEM_MAP_VER1 },
-	{ .compatible = "qcom,dcc-v2", .data = (void *)MEM_MAP_VER2 },
-	{ .compatible = "qcom,dcc-v3", .data = (void *)MEM_MAP_VER3 },
-	{ }
-};
-MODULE_DEVICE_TABLE(of, dcc_match_table);
-
 static struct platform_driver dcc_driver = {
 	.probe = dcc_probe,
 	.remove	= dcc_remove,
 	.driver	= {
 		.name = "qcom-dcc",
-		.of_match_table	= dcc_match_table,
 	},
 };
 

drivers/misc/qcom-dcc.h

@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef _QCOM_DCC_H
+#define _QCOM_DCC_H
+
+#include <linux/platform_device.h>
+
+struct dcc_pdata {
+	phys_addr_t	base;
+	resource_size_t	size;
+	phys_addr_t	ram_base;
+	resource_size_t	ram_size;
+	u32		dcc_offset;
+	u8		map_ver;
+};
+
+#endif