PENDING: media: iris: enable context banks on sm8550 and sa8775p

Switch the iris video codec node in sm8550 (kailua) and sa8775p (lemans)
DTS from the legacy 'iommus' property to 'iommu-map', assigning named
function IDs (IRIS_NON_PIXEL_VCODEC and IRIS_PIXEL) to each SMMU stream
mapping. This allows the driver to look up and attach the correct IOMMU
domain per context bank instead of sharing a single domain.

Add a new dt-bindings header include/dt-bindings/media/qcom,sm8550-iris.h
that defines the two function identifiers so they can be shared between
device-trees and the driver without hard-coded magic numbers.

Wire up sm8550_init_cb_devs() in iris_platform_gen2.c to register the
two child context-bank platform devices (iris_non_pixel and iris_pixel)
using iris_create_cb_dev(), and hook it into the sm8550_data platform
data via the new .init_cb_devs callback.

Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
Signed-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com>
Signed-off-by: Gourav Kumar <gouravk@qti.qualcomm.com>

Author: Vishnu Reddy

arch/arm64/boot/dts/qcom/lemans.dtsi

@@ -17,6 +17,7 @@
 #include <dt-bindings/interconnect/qcom,osm-l3.h>
 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
 #include <dt-bindings/mailbox/qcom-ipcc.h>
+#include <dt-bindings/media/qcom,sm8550-iris.h>
 #include <dt-bindings/firmware/qcom,scm.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
 #include <dt-bindings/soc/qcom,gpr.h>
@@ -4608,8 +4609,8 @@
 			resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>;
 			reset-names = "bus";
 
-			iommus = <&apps_smmu 0x0880 0x0400>,
-				 <&apps_smmu 0x0887 0x0400>;
+			iommu-map = <IRIS_NON_PIXEL_VCODEC &apps_smmu 0x0880 0x0400 0x1>,
+				 <IRIS_PIXEL &apps_smmu 0x0887 0x0400 0x1>;
 			dma-coherent;
 
 			status = "disabled";

arch/arm64/boot/dts/qcom/sm8550.dtsi

@@ -18,6 +18,7 @@
 #include <dt-bindings/interconnect/qcom,icc.h>
 #include <dt-bindings/interconnect/qcom,sm8550-rpmh.h>
 #include <dt-bindings/mailbox/qcom-ipcc.h>
+#include <dt-bindings/media/qcom,sm8550-iris.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
 #include <dt-bindings/power/qcom,rpmhpd.h>
 #include <dt-bindings/soc/qcom,gpr.h>
@@ -3292,8 +3293,8 @@
 			resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>;
 			reset-names = "bus";
 
-			iommus = <&apps_smmu 0x1940 0>,
-				 <&apps_smmu 0x1947 0>;
+			iommu-map = <IRIS_NON_PIXEL_VCODEC &apps_smmu 0x1940 0x0 0x1>,
+				 <IRIS_PIXEL &apps_smmu 0x1947 0x0 0x1>;
 			dma-coherent;
 
 			/*

drivers/media/platform/qcom/iris/iris_platform_gen2.c

@@ -4,6 +4,8 @@
  * Copyright (c) 2025 Linaro Ltd
  */
 
+#include <dt-bindings/media/qcom,sm8550-iris.h>
+
 #include "iris_core.h"
 #include "iris_ctrls.h"
 #include "iris_hfi_gen2.h"
@@ -762,6 +764,28 @@ static void iris_set_sm8550_preset_registers(struct iris_core *core)
 	writel(0x0, core->reg_base + 0xB0088);
 }
 
+static int sm8550_init_cb_devs(struct iris_core *core)
+{
+	const u32 f_ids_np[] = {1, IRIS_NON_PIXEL_VCODEC};
+	const u32 f_ids_p[] = {1, IRIS_PIXEL};
+
+	core->dev_np = iris_create_cb_dev(core, "iris_non_pixel", f_ids_np);
+	if (!core->dev_np)
+		return -ENODEV;
+
+	core->dev_p = iris_create_cb_dev(core, "iris_pixel", f_ids_p);
+	if (!core->dev_p)
+		goto unreg_dev_np;
+
+	return 0;
+
+unreg_dev_np:
+	device_unregister(core->dev_np);
+	core->dev_np = NULL;
+
+	return -ENODEV;
+}
+
 static const struct icc_info sm8550_icc_table[] = {
 	{ "cpu-cfg",    1000, 1000     },
 	{ "video-mem",  1000, 15000000 },
@@ -1016,6 +1040,7 @@ const struct iris_platform_data sm8550_data = {
 	.get_vpu_buffer_size = iris_vpu_buf_size,
 	.vpu_ops = &iris_vpu3_ops,
 	.set_preset_registers = iris_set_sm8550_preset_registers,
+	.init_cb_devs = sm8550_init_cb_devs,
 	.icc_tbl = sm8550_icc_table,
 	.icc_tbl_size = ARRAY_SIZE(sm8550_icc_table),
 	.clk_rst_tbl = sm8550_clk_reset_table,

include/dt-bindings/media/qcom,sm8550-iris.h

@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef _DT_BINDINGS_MEDIA_QCOM_SM8550_IRIS_H_
+#define _DT_BINDINGS_MEDIA_QCOM_SM8550_IRIS_H_
+
+/* Function identifiers for iommu-map to attach for the context bank devices */
+#define IRIS_NON_PIXEL_VCODEC		0
+#define IRIS_PIXEL			1
+
+#endif