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<!DOCTYPE html>
<html lang="en">
<head>
<meta charset="UTF-8">
<meta name="viewport" content="width=device-width, initial-scale=1.0">
<title>Alessandro Trifoglio CV</title>
<link rel="stylesheet" href="https://cdnjs.cloudflare.com/ajax/libs/font-awesome/6.0.0-beta3/css/all.min.css">
<link rel="stylesheet" href="cv_style.css">
</head>
<body>
<div class="resume">
<div class="resume_left">
<div class="resume_profile">
<img src="https://raw.githubusercontent.com/openformatproj/profile/refs/heads/main/img/photo.jpg" alt="profile_pic">
</div>
<div class="resume_content">
<div class="resume_item resume_info">
<div class="title">
<p class="bold">alessandro trifoglio</p>
<p class="regular">Senior FPGA, Embedded Software and Low Latency Engineer</p>
</div>
<ul>
<li>
<div class="icon">
<i class="fas fa-map-signs"></i>
</div>
<div class="data">
La Spezia (IT). Available for permanent relocation
</div>
</li>
<li>
<div class="icon">
<i class="fas fa-envelope"></i>
</div>
<div class="data">
<a href="mailto:a.trifoglio@gmail.com">a.trifoglio@gmail.com</a><i class="fas fa-external-link-alt link-icon"></i>
</div>
</li>
<li>
<div class="icon">
<i class="fas fa-phone"></i>
</div>
<div class="data">
+39 380 367 9736
</div>
</li>
<li>
<div class="icon">
<i class="fab fa-github"></i>
</div>
<div class="data">
<a href="https://github.com/openformatproj/" target="_blank">openformatproj</a><i class="fas fa-external-link-alt link-icon"></i>
</div>
</li>
<li>
<div class="icon">
<i class="fab fa-linkedin"></i>
</div>
<div class="data">
<a href="https://www.linkedin.com/in/alessandro-trifoglio/" target="_blank">alessandro-trifoglio</a><i class="fas fa-external-link-alt link-icon"></i>
</div>
</li>
</ul>
</div>
<div class="resume_item resume_skills">
<div class="title">
<p class="bold">skills</p>
</div>
<ul>
<li>
<div class="skill_name">
FPGA Design
<ul>
<li>Xilinx (Artix, Zynq, Zynq UltraScale+ MPSoC)</li>
<li>Intel (MAX, Cyclone)</li>
<li>Lattice</li>
</ul>
</div>
</li>
<li>
<div class="skill_name">
Real-Time Software Design
<ul>
<li>Micro-controllers</li>
<li>ARM-based CPUs and SoCs</li>
</ul>
</div>
</li>
<li>
<div class="skill_name">
Project Management and Continuous Integration (CI/CD)
<ul>
<li>Git</li>
<li>GitHub Actions</li>
<li>Custom Python pipelines</li>
</ul>
</div>
</li>
<li>
<div class="skill_name">
Programming
<ul>
<li>C/C++</li>
<li>VHDL/SystemVerilog</li>
<li>Vivado HLS</li>
<li>CUDA</li>
<li>OpenCL</li>
<li>Java</li>
</ul>
</div>
</li>
<li>
<div class="skill_name">
Algorithms
<ul>
<li>DSP and Control</li>
<li>Computer Vision and ML (denoising, clustering, tracking...)</li>
</ul>
</div>
</li>
<li>
<div class="skill_name">
Model-Based Design Environments
<ul>
<li>Matlab/Simulink</li>
<li>Python</li>
</ul>
</div>
</li>
<li>
<div class="skill_name">
Operating Systems
<ul>
<li>Embedded Linux</li>
<li>RTOS (VxWorks, FreeRTOS)</li>
</ul>
</div>
</li>
<li>
<div class="skill_name">
Electronic Boards Design
<ul>
<li>High-speed digital (DDR, PCIe, Ethernet...)</li>
<li>Analog (power, cross-domain conversion)</li>
</ul>
</div>
</li>
<li>
<div class="skill_name">
Hardware Compliance
<ul>
<li>Experience with Hardware Design Assurance (DO-254)</li>
</ul>
</div>
</li>
<li>
<div class="skill_name">
Spoken Languages
<ul>
<li>Italian (C2)</li>
<li>English (C1)</li>
</ul>
</div>
</li>
</ul>
</div>
</div>
</div>
<div class="page-break"></div>
<div class="resume_right">
<div class="resume_item resume_about">
<div class="title">
<p class="bold">About me</p>
</div>
<p>Highly skilled Embedded Systems Engineer with 10+ years of experience in architecting and developing real-time software and hardware solutions for automation and mission-critical systems characterized by strict timing, power, and safety constraints. I thrive in dynamic, fast-paced environments, managing projects from conception to implementation with a strong focus on low-latency applications, multi-core systems, and FPGA development. My expertise lies in navigating complex technical challenges and collaborating with diverse stakeholders to deliver results under pressure. <br /> <br /> M.Sc. graduate from Scuola Superiore Sant'Anna, one of Italy's premier elite schools.</p>
</div>
<div class="resume_item resume_work">
<div class="title">
<p class="bold">Work experience</p>
</div>
<ul>
<li>
<div class="date">December 2019 - PRESENT</div>
<div class="info">
<p class="semi-bold">Leonardo SpA - BA Defence Systems, La Spezia (IT) <br /> Senior FPGA Engineer (FPGA architectures, software and boards)</p>
<p>I led <b>embedded software</b> and <b>FPGA system development</b> in cutting-edge projects, focusing on <b>real-time solutions</b> and <b>hardware-software integration</b> for various armaments platforms:</p>
<ul>
<li>For Small Calibers LIONFISH 30, 40 (<a href="https://shorturl.at/imntj"
target="_blank">https://shorturl.at/imntj</a><i class="fas fa-external-link-alt link-icon"></i>): managed requirements and stakeholders
(electrical and PCB designers, software engineers), architected high-speed interfaces,
custom video pipelines, and FPGA accelerators:
<ul>
<li>Engineered and brought up <b>Zynq UltraScale+ MPSoC</b> (<b>Cortex-A53,
Cortex-R5, FPGA</b>) based boards, incorporating high-speed interfaces
(Gigabit Ethernet, PCIe, FMC).</li>
<li>Managed the development of complex Zynq UltraScale+ MPSoC based boards
and designed the FPGA architecture for a complete SDI custom video pipeline, optimized
for <b>Embedded Linux</b> integration and <b>high-throughput</b>
requirements.</li>
<li>Developed and implemented <b>video denoising and tracking algorithms</b>
on the FPGA fabric, enhancing the system's autonomous target detection
capabilities.</li>
<li>Designed and generated <b>BSPs (Board Support Packages)</b> to validate
high-speed board
interfaces and FPGA accelerators.</li>
</ul>
</li>
<li>Contributed to Naval, Ammunition, and Land Armaments projects, developing with <b>Intel</b> and <b>Lattice</b> FPGA architectures using VHDL.</li>
</ul>
</p>
<p>
Across all projects, key contributions included:<br>
<ul>
<li>Developed VHDL (DSP, control algorithms...) and <b>SystemVerilog</b> testbenches, performing extensive FPGA behavior simulation on
<b>Questa Sim</b>.
</li>
<li>Developed <b>bare-metal C/C++</b> software for validating boards and FPGA.
</li>
<li>Managed the development of <b>RTOS drivers</b> (including <b>FreeRTOS</b>) for diverse peripherals (sensors: ADC, encoders, resolvers, IMUs; actuators: PWM and EtherCAT based
motors) on <b>ARM-based CPU and SoC (Cortex-R5)</b>, overseeing <b>software-hardware integration</b> for thorough validation and meeting <b>real-time performance</b> requirements.
</li>
<li>Executed comprehensive <b>board bring-up</b> for complex FPGA and CPU-based boards (e.g., Kria K26), encompassing hardware validation (power, clocks, JTAG) and initial <b>U-Boot/Linux environment builds</b> to achieve full system functionality.</li>
<li>Extensively utilized <b>Python</b> for project management, leveraging custom modules and vendor-specific scripts for consistency, <b>Git</b> versioning, configuration management, and documentation generation.
</li>
<li>Developed Avalon/AXI-Stream generic <b>VHDL</b> communication modules for cross-domain reusability
and <b>FPGA accelerator integration</b>, enhancing system modularity and scalability.</li>
<li>Ensured <b>hardware compliance</b> to rigorous defense standards like <b>DO-254</b> during FPGA and electronic board design and development.</li>
</ul>
</p>
</div>
</li>
<li>
<div class="date">December 2015 - December 2018</div>
<div class="info">
<p class="semi-bold">Freelance, Livorno (IT) <br /> Design of Administrative Software</p>
<p>I developed custom software solutions for small companies to streamline their order
management, accounting, and stock control processes:
<ul>
<li>Performed full-stack development of the application, including database design,
backend logic,
and API integration with <b>Node.js</b>.</li>
<li>Managed integration and deployment on site.</li>
<li>Provided documentation.</li>
<li>Conducted training.</li>
<li>Offered after-sales assistance.</li>
</ul>
</p>
</div>
</li>
<li>
<div class="date">March 2012 - December 2015</div>
<div class="info">
<p class="semi-bold">Freelance, Livorno (IT) <br /> Design of Electronic Boards and Software for Micro-controllers</p>
<p> I developed control software and boards for actuating systems such as automatic gates
built by local small companies:
<ul>
<li>Developed software for micro-controllers (C/C++).</li>
<li>Developed software for GPUs (<b>CUDA</b>).</li>
<li>Designed customized boards.</li>
<li>Managed installation.</li>
<li>Offered after-sales assistance.</li>
</ul>
</p>
</div>
</li>
</ul>
</div>
<div class="resume_item resume_education">
<div class="title">
<p class="bold">Education</p>
</div>
<ul>
<li>
<div class="date">September 2016 - November 2020</div>
<div class="info">
<p class="semi-bold">Scuola Superiore Sant'Anna, Pisa (IT) <br /> M.Sc. in Embedded Computing Systems</p>
<p>Thesis: Schedule Optimization of Real-Time Flight Control Software for Multicore
Platforms
<ul>
<li>Carried out at RETIS LAB in support of a project funded by Leonardo Helicopters.</li>
<li>Mark: full with honors.</li>
</ul>
</p>
</div>
</li>
<li>
<div class="date">2015</div>
<div class="info">
<p class="semi-bold">Bachelor Degree in Electronic Engineering (PI)</p>
</div>
</li>
</ul>
</div>
<div class="resume_item resume_interests">
<div class="title">
<p class="bold">Interests and Side-Projects</p>
</div>
<ul>
<li><div class="info"><p>Machine Learning</p></div></li>
<li><div class="info"><p>UxVs (<a href="https://shorturl.at/MHXx7" target="_blank">https://shorturl.at/MHXx7</a><i class="fas fa-external-link-alt link-icon"></i>)</p></div></li>
</ul>
</div>
</div>
</div>
<script src="cv_script.js"></script>
</body>
</html>