feat: add Yosys LEC flow support#111
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Pull request overview
Adds a Yosys-based LEC (logic equivalence checking) tool integration and flow support so ECC can run equivalence checks after synthesis and after routing, with test coverage against the ICS55 PDK.
Changes:
- Integrate new
yosys_lectool (builder/runner/subflow) and wire it into EngineFlow/rtl2gds flows. - Extend Yosys synthesis to emit an additional “golden” netlist for LEC handoff.
- Add focused tests and repo layout updates (test assets, gitignore, submodule entry).
Reviewed changes
Copilot reviewed 18 out of 18 changed files in this pull request and generated 4 comments.
Show a summary per file
| File | Description |
|---|---|
test/yosys_lec/test_tools_yosys_lec.py |
Adds unit tests covering yosys golden netlist generation, yosys_lec step building, and EngineFlow wiring. |
test/yosys_lec/.gitignore |
Ignores generated yosys_lec run artifacts under test/yosys_lec/runs/. |
test/test_tools_yosys_runner.py |
Updates yosys runner tests to account for golden netlist output. |
chipcompiler/tools/yosys/scripts/yosys_synthesis.tcl |
Emits a golden netlist file during synthesis when configured. |
chipcompiler/tools/yosys/runner.py |
Treats missing golden netlist as a synthesis failure when configured. |
chipcompiler/tools/yosys/builder.py |
Adds golden_netlist_file into generated Tcl and defines golden output path. |
chipcompiler/tools/yosys_lec/utility.py |
Exposes yosys availability check for yosys_lec. |
chipcompiler/tools/yosys_lec/subflow.py |
Implements subflow tracking for yosys_lec steps. |
chipcompiler/tools/yosys_lec/runner.py |
Runs yosys-based LEC Tcl and produces a result json on success. |
chipcompiler/tools/yosys_lec/builder.py |
Creates yosys_lec step workspace, config, and run script. |
chipcompiler/tools/yosys_lec/__init__.py |
Exports yosys_lec public API. |
chipcompiler/rtl2gds/builder.py |
Adds build_synthesis_lec_flow and build_post_route_lec_flow. |
chipcompiler/rtl2gds/__init__.py |
Exposes the new LEC flows from the rtl2gds package. |
chipcompiler/engine/flow.py |
Wires LEC steps into workspace step creation and result checks. |
chipcompiler/data/step.py |
Adds LEC and POST_ROUTE_LEC step enums. |
chipcompiler/data/parameter.py |
Adds default LEC parameters (e.g., use_undef) for the ICS55 gcd config. |
.gitmodules |
Adds the ICS55 PDK test submodule entry. |
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| [submodule "test/icsprout55-pdk"] | ||
| path = test/icsprout55-pdk | ||
| url = git@github.com:openecos-projects/icsprout55-pdk.git |
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| # Output files | ||
| set final_netlist_file {_tcl_quote(netlist_file)} | ||
| set golden_netlist_file {_tcl_quote(_abspath(step.output.get("golden_verilog", "")))} |
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| def _tcl_quote(value: str) -> str: | ||
| value = str(value) | ||
| escaped = value.replace("\\", "\\\\").replace('"', '\\"') | ||
| return f'"{escaped}"' |
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| def run_step(workspace: Workspace, step: WorkspaceStep, ecc_module=None) -> bool: | ||
| sub_flow = YosysLecSubFlow(workspace=workspace, workspace_step=step) | ||
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| yosys_cmd, yosys_env = get_yosys_runtime() |
Emin017
requested changes
Jun 9, 2026
Emin017
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I made some review comments and please fix all of Copilot’s review comments.
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Add make unzip step in ci config.
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| [submodule "test/icsprout55-pdk"] | ||
| path = test/icsprout55-pdk | ||
| url = git@github.com:openecos-projects/icsprout55-pdk.git |
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| if ( | ||
| workspace_step.tool == "yosys_lec" | ||
| or workspace_step.name in (StepEnum.LEC.value, StepEnum.POST_ROUTE_LEC.value) | ||
| ): | ||
| return os.path.exists(workspace_step.output.get("json", "")) |
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Prefer to use match:
Suggested change
| if ( | |
| workspace_step.tool == "yosys_lec" | |
| or workspace_step.name in (StepEnum.LEC.value, StepEnum.POST_ROUTE_LEC.value) | |
| ): | |
| return os.path.exists(workspace_step.output.get("json", "")) | |
| match (workspace_step.tool, workspace_step.name): | |
| case ("yosys_lec", _) | (_, StepEnum.LEC.value) | (_, StepEnum.POST_ROUTE_LEC.value): | |
| return os.path.exists(workspace_step.output.get("json", "")) |
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| # Output files | ||
| set final_netlist_file {_tcl_quote(netlist_file)} | ||
| set golden_netlist_file {_tcl_quote(_abspath(step.output.get("golden_verilog", "")))} |
| return True | ||
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| sub_flow.update_step(step_name="run lec", state=StateEnum.Imcomplete) | ||
| return False |
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[P1] Failed LEC reruns can still be marked successful
-
check_step_result()accepts any existing LEC result JSON assuccess. runner.run_step()only writes JSON on proven success and leaves any old JSON in place on failure. Scenario: LEC succeeds
once, then a rerun fails equivalence; the stale JSON remains, so EngineFlow.run_step() ignores the runner’s False result and sets the step back to Success. -
Fix: remove/write an incomplete result at run start or on failure, and make check_step_result() parse JSON and require status == "proven".
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| def _tcl_quote(value: str) -> str: | ||
| value = str(value) | ||
| escaped = value.replace("\\", "\\\\").replace('"', '\\"') | ||
| return f'"{escaped}"' |
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Summary
yosys_lectool integration for synthesis and post-route equivalence checking.yosys_lectests.Verification
PYTHONPATH=/tmp/ecc-dreamplace-py311-install:/home/zhaoxueyan/code/ecc /home/zhaoxueyan/anaconda3/envs/PlaceOPT/bin/python /tmp/run_ics55_gcd_post_route_lec.pySynthesis -> Floorplan -> fixFanout -> place -> CTS -> legalization -> route -> postRouteLec.status=proven, 316 proven / 0 unproven$equivcells./home/zhaoxueyan/code/ecc/test/yosys_lec/runs/ics55_gcd_post_route_lec/postRouteLec_yosys_lec/output/gcd_postRouteLec_result.json.PYTHONPATH=/tmp/ecc-dreamplace-py311-install:/home/zhaoxueyan/code/ecc /home/zhaoxueyan/anaconda3/envs/PlaceOPT/bin/python -m pytest test/test_design_parameters.py test/test_tools_yosys_runner.py test/yosys_lec/test_tools_yosys_lec.py -q24 passed in 0.67sPYTHONPATH=/tmp/ecc-dreamplace-py311-install:/home/zhaoxueyan/code/ecc /home/zhaoxueyan/anaconda3/envs/PlaceOPT/bin/python -m py_compile ...git diff --cached --check