feat: integrate ecc-sizer timing opt tool#110
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Pull request overview
Integrates the ECC-Sizer “Sizer” binary into the ECC toolchain so the flow can run timing optimization steps via the new ecc_sizer builder/runner, with Bazel/dev-environment support and tests.
Changes:
- Add
chipcompiler.tools.ecc_sizer(builder/runner/utility) and hook it into tool-module resolution and workspace CLI. - Extend flow step result validation so TIMING_OPT steps succeed with DEF+Verilog outputs (no GDS required).
- Add Bazel CMake build + install scripts and update dev docs/tests for ECC-Sizer.
Reviewed changes
Copilot reviewed 19 out of 21 changed files in this pull request and generated 4 comments.
Show a summary per file
| File | Description |
|---|---|
| test/test_ecc_sizer_module.py | Adds unit tests for sizer step config, runner invocation, and TIMING_OPT result validation. |
| MODULE.bazel.lock | Updates Bazel module lockfile registry hash URLs (now pointing at a mirror). |
| MODULE.bazel | Adds local source repo for ecc-sizer thirdparty source tree. |
| docs/development.md | Documents ECC-Sizer dev build/install and submodule init requirements. |
| chipcompiler/tools/eda.py | Adds sizer → ecc_sizer alias for module lookup. |
| chipcompiler/tools/ecc/builder.py | Adds a StepEnum.TIMING_OPT data directory mapping. |
| chipcompiler/tools/ecc_sizer/utility.py | Adds helpers to locate sizer source root and runtime binary, with env overrides. |
| chipcompiler/tools/ecc_sizer/runner.py | Adds runner that executes Sizer with generated env/cmd files and validates outputs. |
| chipcompiler/tools/ecc_sizer/builder.py | Adds builder that generates sizer env/cmd files based on workspace/PDK parameters. |
| chipcompiler/tools/ecc_sizer/init.py | Exposes ecc_sizer builder/runner/utility API. |
| chipcompiler/thirdparty/BUILD.bazel | Adds ecc_sizer_cmake Bazel CMake build rule to build the Sizer binary. |
| chipcompiler/pyinstaller_utils.py | Excludes ecc-sizer thirdparty subtree from PyInstaller payload. |
| chipcompiler/engine/flow.py | Treats TIMING_OPT variants as successful when DEF+Verilog exist (no GDS). |
| chipcompiler/cli/workspace/service.py | Adds sizer → ecc_sizer alias for CLI builder imports. |
| chipcompiler/BUILD.bazel | Excludes thirdparty/ecc-sizer/** from Python globs. |
| bazel/scripts/prepare-dev.sh | Runs install-sizer during prepare_dev and prints guidance on failure. |
| bazel/scripts/install-sizer.sh | Adds script to install/clean Bazel-built Sizer into the source tree for dev use. |
| bazel/scripts/BUILD.bazel | Wires install_sizer/clean_sizer and adds sizer CMake artifact to prepare-dev. |
| .gitmodules | Adds ecc-sizer submodule entry. |
| .gitignore | Ignores installed chipcompiler/tools/ecc_sizer/bin/ artifacts. |
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| env_text = open(step.script["sizer_env"], encoding="utf-8").read() | ||
| cmd_text = open(step.script["sizer_cmd"], encoding="utf-8").read() |
| os.makedirs(os.path.dirname(step.output["def"]), exist_ok=True) | ||
| open(step.output["def"], "w", encoding="utf-8").write("def\n") | ||
| open(step.output["verilog"], "w", encoding="utf-8").write("module gcd; endmodule\n") |
Emin017
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I have made some comments on the construction, and I will test the flow process locally.
Please also add timing optimization step in rtl2gds flow, so we can test this flow on ci (test/test_tools.py).
ecc/chipcompiler/rtl2gds/builder.py
Line 9 in 49822cb
| "BUILD_GUI": "OFF", | ||
| "BUILD_PYTHON": "OFF", | ||
| "CMAKE_BUILD_TYPE": "Release", | ||
| "CMAKE_CXX_COMPILER": "/usr/bin/g++", |
| set -euo pipefail | ||
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| WS="${BUILD_WORKSPACE_DIRECTORY:?Must run via: bazel run //bazel/scripts:install_sizer}" | ||
| SIZER_RUNTIME_DIR="${WS}/chipcompiler/tools/ecc_sizer/bin" |
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Is sizer added to chipcompiler/tools/ecc_sizer/bin as an executable file? I think injecting the executable file path into get_sizer_command is a better way to handle it.
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Due to the need to distribute ecc cli, it may be necessary to consider building sizer as an independent python wheel or ecc monorepo.
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It might be better to build outside the tree and provide the executable by PATH like yosys.
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Summary
Scope
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uv.lock, or release artifacts.What Changed
Validation
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uv run pytest test/uv run ruff check chipcompiler testuv run ruff format --check chipcompiler testbazel build //:build_ecc_cli_bundleecc --help,ecc --version,ecc version --jsonnix run .#cli -- --helpSkipped checks and reason:
Runtime And Packaging Impact
ecc-toolsorecc-dreamplacedependency changedNotes:
Checklist