ARM Processor Context Information Structure Padded to multiple of 16-bytes

[TylerRoyere]

According to the UEFI Section N.2.4.4, Arm Processor Error Section

The "Processor Context" mnemonic has the following inside the description

Each processor context information structure is padded with zeros if the size is not a multiple of 16 bytes.

The function that converts ARM processor context structures into IR cper_arm_processor_context_to_ir() does not account for any padding that might be present if the value of 8 + "Register Array Size" is not a multiple of 16-bytes.

AFAICT the same kind of problem exists in the code that generates ARM processor context structures inside ARM CPER section types (see generate_arm_context_info())

[edtanous]

All the above seems reasonable. I suspect we need to just make sure that any structs we're unpacking include the "extra" bits as reserved bits, then assert that sizeof(struct % 16 == 0) to make sure we don't regress ever.

If this is a change you'd like to engineer, please send patches to the openbmc gerrit instance.

[edtanous]

@TylerRoyere is this something you plan on submitting a patch to fix?