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New to VHDL #10

@Electronscape32

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@Electronscape32

the code here im trying to use this, but i have no idea where to start
i've added the single file to project file.
but i have a different TOP file.

when using component, non of the physical pins are registered and doesnt synthesise

TOP_MAIN.vhdl
SDRAM.vhdl
SDRAMPLL.vhdl

how would i go about this??
thanks

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