Motivation
I'm building a SIMD abstraction module for MoonBit (mizchi/simd) that provides optimized array operations (sum, dot product, adler32, etc.). The native target achieves 13–33x speedup via C FFI, but the wasm target is stuck on scalar fallback because Dwarfsm doesn't fully support v128 SIMD instructions.
Related: #2844
Current Dwarfsm v128 Support Status
I investigated the Dwarfsm source (dwarfsm_parse.ml in moonbitlang/moonbit-compiler) and tested inline WAT with various v128 instructions:
| Feature |
Status |
Notes |
v128 as valtype (param/result) |
✅ Works |
|
v128.load / v128.store |
✅ Works |
Memory access |
f32x4.add, f32x4.mul, f64x2.add, f64x2.mul |
✅ Works |
Float SIMD ops |
v128.const |
❌ Parse error |
Constant initialization |
i32x4.add, i32x4.mul, etc. |
❌ Parse error |
Integer SIMD ops |
i32x4.extract_lane, i8x16.shuffle |
❌ Parse error |
Lane manipulation |
Two Remaining Blockers
1. Missing instruction table entries in Dwarfsm
i32x4.*, i8x16.*, v128.const, and other integer SIMD instructions are not registered in dwarfsm_parse.ml. The float SIMD ops (f32x4.*, f64x2.*) already work, so adding the missing patterns to the instruction table should be straightforward.
2. #external type maps to externref in wasm
When defining #external type V128 in MoonBit, it compiles to externref in the wasm output. This causes a type mismatch with inline WAT that uses v128:
CompileError: type mismatch (externref vs v128)
A language-level v128 type or a way to control the wasm representation of #external type would be needed.
Context
- Repository with benchmarks and investigation: https://github.com/mizchi/simd
- The
wasm_memory_ptr pattern (FixedArray ptr + 8 byte offset) for linear memory access has been verified and is ready for use once SIMD support lands.
Requested Changes
- Add missing v128 instruction patterns to
dwarfsm_parse.ml (integer SIMD ops + v128.const)
- Provide a way to use
v128 as a proper wasm value type (not externref) from MoonBit code
Motivation
I'm building a SIMD abstraction module for MoonBit (mizchi/simd) that provides optimized array operations (sum, dot product, adler32, etc.). The native target achieves 13–33x speedup via C FFI, but the wasm target is stuck on scalar fallback because Dwarfsm doesn't fully support v128 SIMD instructions.
Related: #2844
Current Dwarfsm v128 Support Status
I investigated the Dwarfsm source (
dwarfsm_parse.mlin moonbitlang/moonbit-compiler) and tested inline WAT with various v128 instructions:v128as valtype (param/result)v128.load/v128.storef32x4.add,f32x4.mul,f64x2.add,f64x2.mulv128.consti32x4.add,i32x4.mul, etc.i32x4.extract_lane,i8x16.shuffleTwo Remaining Blockers
1. Missing instruction table entries in Dwarfsm
i32x4.*,i8x16.*,v128.const, and other integer SIMD instructions are not registered indwarfsm_parse.ml. The float SIMD ops (f32x4.*,f64x2.*) already work, so adding the missing patterns to the instruction table should be straightforward.2.
#external typemaps toexternrefin wasmWhen defining
#external type V128in MoonBit, it compiles toexternrefin the wasm output. This causes a type mismatch with inline WAT that usesv128:A language-level
v128type or a way to control the wasm representation of#external typewould be needed.Context
wasm_memory_ptrpattern (FixedArrayptr + 8 byte offset) for linear memory access has been verified and is ready for use once SIMD support lands.Requested Changes
dwarfsm_parse.ml(integer SIMD ops +v128.const)v128as a proper wasm value type (notexternref) from MoonBit code