diff --git a/bin/forthytwo.exe b/bin/forthytwo.exe
index 0d14996..fba0298 100644
Binary files a/bin/forthytwo.exe and b/bin/forthytwo.exe differ
diff --git a/forthytwoCompiler/src/util.cs b/forthytwoCompiler/src/util.cs
index 11376e8..3aeb7b9 100644
--- a/forthytwoCompiler/src/util.cs
+++ b/forthytwoCompiler/src/util.cs
@@ -1,5 +1,6 @@
 using System;
 using System.Collections.Generic;
+using System.Globalization;
 
 static class util {
 
@@ -45,7 +46,7 @@ public static bool tryParseNum(string text, out UInt32 val, bool enableFloat) {
 
         if(enableFloat && text.Contains(".")) {
             double vDouble;
-            if(Double.TryParse(text, out vDouble)) {
+            if(Double.TryParse(text, NumberStyles.Number, CultureInfo.CreateSpecificCulture("en-US"), out vDouble)) {
                 val = double2flm(vDouble);
                 return true;
             }
diff --git a/fractalsProject/CMODA7_fractalDemo/CMODA7_fractalDemo.srcs/fpgatop.v b/fractalsProject/CMODA7_fractalDemo/CMODA7_fractalDemo.srcs/fpgatop.v
index 0807745..dbd946d 100644
--- a/fractalsProject/CMODA7_fractalDemo/CMODA7_fractalDemo.srcs/fpgatop.v
+++ b/fractalsProject/CMODA7_fractalDemo/CMODA7_fractalDemo.srcs/fpgatop.v
@@ -81,7 +81,7 @@ module fpgatop(CLK12, pioA, PMOD, uart_rxd_out, uart_txd_in, RGBLED, LED, BTN);
    reg [31:0] 			io_din;
    
    top #(.vgaX(vgaX), .vgaY(vgaY)) iTop
-     (.clk(clk200), .o_frameCount(frameCount),
+     (.clk(clk200), .cpuClk(cpuClk), .o_frameCount(frameCount),
       .i_run(cpuReg[5][0]), .i_simFlush(cpuReg[5][1]),
       .vgaClk(vgaClk), .o_RED(vgaRed), .o_GREEN(vgaGreen), .o_BLUE(vgaBlue), .o_HSYNC(vgaHsync), .o_VSYNC(vgaVsync), 
       .i_x0(cpuReg[0]), .i_y0(cpuReg[2]), .i_dxCol(cpuReg[1]), .i_dyCol(cpuReg[7]), .i_dxRow(cpuReg[6]), .i_dyRow(cpuReg[3]), .i_maxiter(cpuReg[4][7:0]),
diff --git a/fractalsProject/CMODA7_fractalDemo/CMODA7_fractalDemo.srcs/mandel.v b/fractalsProject/CMODA7_fractalDemo/CMODA7_fractalDemo.srcs/mandel.v
index 5d7d3a9..b2b120c 100644
--- a/fractalsProject/CMODA7_fractalDemo/CMODA7_fractalDemo.srcs/mandel.v
+++ b/fractalsProject/CMODA7_fractalDemo/CMODA7_fractalDemo.srcs/mandel.v
@@ -651,7 +651,7 @@ module generator(clk,
    //assign o_res = EF_DEBUG_res;   
 endmodule
 
-module top(clk, vgaClk, o_frameCount, i_run, i_simFlush,
+module top(clk, vgaClk, cpuClk, o_frameCount, i_run, i_simFlush,
 	   o_RED, o_GREEN, o_BLUE, o_HSYNC, o_VSYNC, 
 	   i_x0, i_y0, i_dxCol, i_dxRow, i_dyCol, i_dyRow, i_maxiter, 
 	   i_wrColMap, i_addrColMap, i_valColMap);   
@@ -661,6 +661,7 @@ module top(clk, vgaClk, o_frameCount, i_run, i_simFlush,
    
    input wire clk;
    input wire vgaClk;
+   input wire cpuClk;
 
    output wire [3:0] o_frameCount;
    input wire 	     i_run;   
@@ -742,7 +743,7 @@ module top(clk, vgaClk, o_frameCount, i_run, i_simFlush,
    // vga color mapping and blanking
    // ================================================================================
    reg [2:0] 		    colMap[0:63];
-   always @(posedge clk)
+   always @(posedge cpuClk)
      if (i_wrColMap)
        colMap[i_addrColMap] <= i_valColMap;