Request Overview
Many makefile based project specify a lot of preprocessor macros in the make file, to toggle various options in the code base.
For example,
C_DEFS += \
'-DDEBUG_EFM=1'
...
override CFLAGS = $(C_FLAGS) $(C_DEFS) $(INCLUDES) $(DEPFLAGS)
...
$(OUTPUT_DIR)/%.o: %.c
@echo 'Building $<'
@mkdir -p $(@D)
$(ECHO)$(CC) $(CFLAGS) -c -o $@ $<
Currently it seems that Visual Studio Code is not aware of any of the macros defined this way, and therefore displays the code wrong. I would like Makefile Tools to recognize these macros and communicate them to the code model.
Additional Information
No response
Request Overview
Many makefile based project specify a lot of preprocessor macros in the make file, to toggle various options in the code base.
For example,
Currently it seems that Visual Studio Code is not aware of any of the macros defined this way, and therefore displays the code wrong. I would like Makefile Tools to recognize these macros and communicate them to the code model.
Additional Information
No response