From 89d6915541b117f1d99ccc6bb4ce78be2b801451 Mon Sep 17 00:00:00 2001 From: Mac Chiang Date: Fri, 12 Sep 2025 18:31:55 +0800 Subject: [PATCH 1/2] ASoC: Intel: soc-acpi-ptl-match: add cs42l43_agg_l3_cs35l56_2 support This patch adds the aggregated mode support: cs42l43 codec with left and right tweeters on soundwire link 3, cs35l56 left and right woofers on soundwire link 2. Signed-off-by: Mac Chiang --- .../intel/common/soc-acpi-intel-ptl-match.c | 44 +++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/sound/soc/intel/common/soc-acpi-intel-ptl-match.c b/sound/soc/intel/common/soc-acpi-intel-ptl-match.c index 99ff1771248bb5..060955825fe00a 100644 --- a/sound/soc/intel/common/soc-acpi-intel-ptl-match.c +++ b/sound/soc/intel/common/soc-acpi-intel-ptl-match.c @@ -236,6 +236,30 @@ static const struct snd_soc_acpi_adr_device cs42l43_2_adr[] = { } }; +static const struct snd_soc_acpi_adr_device cs42l43_3_agg_adr[] = { + { + .adr = 0x00033001FA424301ull, + .num_endpoints = ARRAY_SIZE(cs42l43_amp_spkagg_endpoints), + .endpoints = cs42l43_amp_spkagg_endpoints, + .name_prefix = "cs42l43" + } +}; + +static const struct snd_soc_acpi_adr_device cs35l56_2_lr_adr[] = { + { + .adr = 0x00023001fa355601ull, + .num_endpoints = 1, + .endpoints = &spk_l_endpoint, + .name_prefix = "AMP1" + }, + { + .adr = 0x00023101fa355601ull, + .num_endpoints = 1, + .endpoints = &spk_r_endpoint, + .name_prefix = "AMP2" + } +}; + static const struct snd_soc_acpi_adr_device cs35l56_1_3amp_adr[] = { { .adr = 0x00013001fa355601ull, @@ -440,6 +464,20 @@ static const struct snd_soc_acpi_adr_device rt1320_3_group2_adr[] = { } }; +static const struct snd_soc_acpi_link_adr ptl_cs42l43_agg_l3_cs35l56_l2[] = { + { + .mask = BIT(3), + .num_adr = ARRAY_SIZE(cs42l43_3_agg_adr), + .adr_d = cs42l43_3_agg_adr, + }, + { + .mask = BIT(2), + .num_adr = ARRAY_SIZE(cs35l56_2_lr_adr), + .adr_d = cs35l56_2_lr_adr, + }, + {} +}; + static const struct snd_soc_acpi_link_adr ptl_cs42l43_l2_cs35l56x6_l13[] = { { .mask = BIT(2), @@ -675,6 +713,12 @@ struct snd_soc_acpi_mach snd_soc_acpi_intel_ptl_sdw_machines[] = { .sof_tplg_filename = "sof-ptl-rt712-l3-rt1320-l2.tplg", .get_function_tplg_files = sof_sdw_get_tplg_files, }, + { + .link_mask = BIT(2) | BIT(3), + .links = ptl_cs42l43_agg_l3_cs35l56_l2, + .drv_name = "sof_sdw", + .sof_tplg_filename = "sof-ptl-cs42l43-agg-l3-cs35l56-l2.tplg", + }, { .link_mask = BIT(0), .links = ptl_rvp, From d6ebbfb01beb4998c35e7d8674e5a924e6b20e20 Mon Sep 17 00:00:00 2001 From: Mac Chiang Date: Fri, 12 Sep 2025 18:44:48 +0800 Subject: [PATCH 2/2] ASoC: Intel: sof_sdw: add codec speaker support for the SKU This patch adds Cirrus codec internal speaker configuration to support the cs42l43_l3_cs35l56_l2 machine. Signed-off-by: Mac Chiang --- sound/soc/intel/boards/sof_sdw.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/sound/soc/intel/boards/sof_sdw.c b/sound/soc/intel/boards/sof_sdw.c index 36cf7e51b72dfa..5526193754c368 100644 --- a/sound/soc/intel/boards/sof_sdw.c +++ b/sound/soc/intel/boards/sof_sdw.c @@ -778,6 +778,17 @@ static const struct dmi_system_id sof_sdw_quirk_table[] = { }, .driver_data = (void *)(SOC_SDW_PCH_DMIC), }, + { + .callback = sof_sdw_quirk_cb, + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Google"), + DMI_MATCH(DMI_PRODUCT_NAME, "Lapis"), + }, + .driver_data = (void *)(SOC_SDW_CODEC_SPKR | + SOC_SDW_PCH_DMIC | + SOF_BT_OFFLOAD_SSP(2) | + SOF_SSP_BT_OFFLOAD_PRESENT), + }, { .callback = sof_sdw_quirk_cb, .matches = {