From f2a00f0edd525358dbd847dc69a796b122dcd77d Mon Sep 17 00:00:00 2001 From: ivan Date: Thu, 3 Jul 2025 04:21:56 -0600 Subject: [PATCH] adding reverse bits --- .../top_150_questions_round_17/reverse_bits.py | 6 ++++++ .../test_reverse_bits_round_17.py | 11 +++++++++++ 2 files changed, 17 insertions(+) create mode 100644 src/my_project/interviews/top_150_questions_round_17/reverse_bits.py create mode 100644 tests/test_150_questions_round_17/test_reverse_bits_round_17.py diff --git a/src/my_project/interviews/top_150_questions_round_17/reverse_bits.py b/src/my_project/interviews/top_150_questions_round_17/reverse_bits.py new file mode 100644 index 00000000..e79d85e3 --- /dev/null +++ b/src/my_project/interviews/top_150_questions_round_17/reverse_bits.py @@ -0,0 +1,6 @@ +from typing import List, Union, Collection, Mapping, Optional +from abc import ABC, abstractmethod + +class Solution: + def reverseBits(self, n: int) -> int: + return int((('{0:032b}'.format(n))[::-1]),2) \ No newline at end of file diff --git a/tests/test_150_questions_round_17/test_reverse_bits_round_17.py b/tests/test_150_questions_round_17/test_reverse_bits_round_17.py new file mode 100644 index 00000000..624d7e26 --- /dev/null +++ b/tests/test_150_questions_round_17/test_reverse_bits_round_17.py @@ -0,0 +1,11 @@ +import unittest +from src.my_project.interviews.top_150_questions_round_17\ +.reverse_bits import Solution + +class ReverseBitsTestCase(unittest.TestCase): + + def test_reverse_bits(self): + solution = Solution() + output = solution.reverseBits(2) + target = 1073741824 + self.assertEqual(output, target) \ No newline at end of file