Revert "Coherency patch cleanup"

This reverts commit 8d7e175.

Change-Id: Ia5e2d3dd6f622859320e57e659c677c53b775d2a

Author: BartoszDunajski

runtime/os_interface/linux/drm_buffer_object.cpp

@@ -156,6 +156,9 @@ int BufferObject::exec(uint32_t used, size_t startOffset, unsigned int flags, bo
     execbuf.batch_len = alignUp(used, 8);
     execbuf.flags = flags;
 
+    if (drm->peekCoherencyDisablePatchActive() && !requiresCoherency) {
+        execbuf.flags |= I915_PRIVATE_EXEC_FORCE_NON_COHERENT;
+    }
     if (lowPriority) {
         execbuf.rsvd1 = this->drm->lowPriorityContextId & I915_EXEC_CONTEXT_ID_MASK;
     }
@@ -190,6 +193,10 @@ int BufferObject::pin(BufferObject *boToPin[], size_t numberOfBos) {
     execbuf.buffer_count = boIndex + 1;
     execbuf.batch_len = alignUp(static_cast<uint32_t>(sizeof(uint32_t)), 8);
 
+    if (drm->peekCoherencyDisablePatchActive()) {
+        execbuf.flags = execbuf.flags | I915_PRIVATE_EXEC_FORCE_NON_COHERENT;
+    }
+
     int err = 0;
     int ret = this->drm->ioctl(DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
     if (ret != 0) {

runtime/os_interface/linux/drm_neo.cpp

@@ -115,6 +115,12 @@ int Drm::getMaxGpuFrequency(int &maxGpuFrequency) {
     return 0;
 }
 
+void Drm::obtainCoherencyDisablePatchActive() {
+    int value = 0;
+    auto ret = getParamIoctl(I915_PRIVATE_PARAM_HAS_EXEC_FORCE_NON_COHERENT, &value);
+    coherencyDisablePatchActive = (ret == 0) && (value != 0);
+}
+
 std::string Drm::getSysFsPciPath(int deviceID) {
     std::string nullPath;
     std::string sysFsPciDirectory = Os::sysFsPciPath;

runtime/os_interface/linux/drm_neo.h

@@ -33,6 +33,10 @@
 struct GT_SYSTEM_INFO;
 
 namespace OCLRT {
+
+#define I915_PRIVATE_PARAM_HAS_EXEC_FORCE_NON_COHERENT (-1)
+#define I915_PRIVATE_EXEC_FORCE_NON_COHERENT (1 << 31)
+
 #define I915_CONTEXT_PRIVATE_PARAM_BOOST 0x80000000
 
 class DeviceFactory;
@@ -70,6 +74,8 @@ class Drm {
     bool is48BitAddressRangeSupported();
     MOCKABLE_VIRTUAL bool hasPreemption();
     bool setLowPriority();
+    bool peekCoherencyDisablePatchActive() { return coherencyDisablePatchActive; }
+    virtual void obtainCoherencyDisablePatchActive();
     int getFileDescriptor() const { return fd; }
     bool contextCreate();
     void contextDestroy();
@@ -83,6 +89,7 @@ class Drm {
     int deviceId;
     int revisionId;
     GTTYPE eGtType;
+    bool coherencyDisablePatchActive = false;
     Drm(int fd) : lowPriorityContextId(0), fd(fd), deviceId(0), revisionId(0), eGtType(GTTYPE_UNDEFINED) {}
     virtual ~Drm();
 

runtime/os_interface/linux/drm_null_device.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017 - 2018, Intel Corporation
+ * Copyright (c) 2017, Intel Corporation
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -54,6 +54,8 @@ class DrmNullDevice : public Drm {
         }
     }
 
+    void obtainCoherencyDisablePatchActive() override { coherencyDisablePatchActive = true; }
+
   protected:
     DrmNullDevice(int fd) : Drm(fd), gpuTimestamp(0){};
 

runtime/os_interface/linux/hw_info_config.cpp

@@ -131,6 +131,7 @@ int HwInfoConfig::configureHwInfo(const HardwareInfo *inHwInfo, HardwareInfo *ou
     }
     pSysInfo->SubSliceCount = static_cast<uint32_t>(subSliceCount);
 
+    drm->obtainCoherencyDisablePatchActive();
     pSkuTable->ftrSVM = drm->is48BitAddressRangeSupported();
 
     int maxGpuFreq = 0;
@@ -163,8 +164,10 @@ int HwInfoConfig::configureHwInfo(const HardwareInfo *inHwInfo, HardwareInfo *ou
     outHwInfo->capabilityTable.maxRenderFrequency = maxGpuFreq;
     outHwInfo->capabilityTable.ftrSvm = pSkuTable->ftrSVM;
 
+    bool platformCoherency = false;
     HwHelper &hwHelper = HwHelper::get(pPlatform->eRenderCoreFamily);
-    outHwInfo->capabilityTable.ftrSupportsCoherency = false;
+    hwHelper.setCapabilityCoherencyFlag(const_cast<const HardwareInfo *>(outHwInfo), platformCoherency);
+    outHwInfo->capabilityTable.ftrSupportsCoherency = (platformCoherency && drm->peekCoherencyDisablePatchActive());
 
     outHwInfo->capabilityTable.defaultEngineType = DebugManager.flags.NodeOrdinal.get() == -1
                                                        ? outHwInfo->capabilityTable.defaultEngineType

unit_tests/linux/drm_null_device_tests.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017 - 2018, Intel Corporation
+ * Copyright (c) 2017, Intel Corporation
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -76,6 +76,13 @@ TEST_F(DrmNullDeviceTests, GIVENdrmNullDeviceWHENcallGetDeviceIdTHENreturnProper
     EXPECT_EQ(0x1916, deviceId);
 }
 
+TEST_F(DrmNullDeviceTests, GIVENdrmNullDeviceWHENpeekAndObtainCoherencyDisablePatchActiveTHENreturnNullDeviceValues) {
+    EXPECT_EQ(drmNullDevice->peekCoherencyDisablePatchActive(), false);
+
+    drmNullDevice->obtainCoherencyDisablePatchActive();
+    EXPECT_EQ(drmNullDevice->peekCoherencyDisablePatchActive(), true);
+}
+
 TEST_F(DrmNullDeviceTests, GIVENdrmNullDeviceWHENcallIoctlTHENalwaysSuccess) {
     EXPECT_EQ(drmNullDevice->ioctl(0, nullptr), 0);
 }

unit_tests/os_interface/linux/device_command_stream_fixture.h

@@ -80,6 +80,7 @@ class DrmMockCustom : public Drm {
 
         IoctlResExt(int32_t no, int32_t res) : no(no), res(res) {}
     };
+    void overideCoherencyPatchActive(bool newCoherencyPatchActiveValue) { coherencyDisablePatchActive = newCoherencyPatchActiveValue; }
 
     class Ioctls {
       public:

unit_tests/os_interface/linux/drm_buffer_object_tests.cpp

@@ -86,6 +86,30 @@ TEST_F(DrmBufferObjectTest, exec) {
     EXPECT_EQ(0u, mock->execBuffer.flags);
 }
 
+TEST_F(DrmBufferObjectTest, givenDrmWithCoherencyPatchActiveWhenExecIsCalledThenFlagsContainNonCoherentFlag) {
+    mock->ioctl_expected.total = 1;
+    mock->ioctl_res = 0;
+    mock->overideCoherencyPatchActive(true);
+
+    auto ret = bo->exec(0, 0, 0);
+    EXPECT_EQ(mock->ioctl_res, ret);
+    uint64_t expectedFlag = I915_PRIVATE_EXEC_FORCE_NON_COHERENT;
+    uint64_t currentFlag = mock->execBuffer.flags;
+    EXPECT_EQ(expectedFlag, currentFlag);
+}
+
+TEST_F(DrmBufferObjectTest, givenDrmWithCoherencyPatchActiveWhenExecIsCalledWithCoherencyRequestThenFlagsDontContainNonCoherentFlag) {
+    mock->ioctl_expected.total = 1;
+    mock->ioctl_res = 0;
+    mock->overideCoherencyPatchActive(true);
+
+    auto ret = bo->exec(0, 0, 0, true);
+    EXPECT_EQ(mock->ioctl_res, ret);
+    uint64_t expectedFlag = 0;
+    uint64_t currentFlag = mock->execBuffer.flags;
+    EXPECT_EQ(expectedFlag, currentFlag);
+}
+
 TEST_F(DrmBufferObjectTest, exec_ioctlFailed) {
     mock->ioctl_expected.total = 1;
     mock->ioctl_res = -1;
@@ -128,6 +152,48 @@ TEST_F(DrmBufferObjectTest, testExecObjectFlags) {
     EXPECT_FALSE(execObject.flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS);
 }
 
+TEST_F(DrmBufferObjectTest, onPinBBhasOnlyBbEndAndForceNonCoherent) {
+    std::unique_ptr<uint32_t[]> buff(new uint32_t[1024]);
+    mock->ioctl_expected.total = 1;
+    mock->ioctl_res = 0;
+
+    mock->overideCoherencyPatchActive(true);
+    std::unique_ptr<BufferObject> boToPin(new TestedBufferObject(this->mock));
+    ASSERT_NE(nullptr, boToPin.get());
+
+    bo->setAddress(buff.get());
+    BufferObject *boArray[1] = {boToPin.get()};
+    auto ret = bo->pin(boArray, 1);
+    EXPECT_EQ(mock->ioctl_res, ret);
+    uint32_t bb_end = 0x05000000;
+    EXPECT_EQ(buff[0], bb_end);
+    EXPECT_GT(mock->execBuffer.batch_len, 0u);
+    uint32_t flag = I915_PRIVATE_EXEC_FORCE_NON_COHERENT;
+    EXPECT_TRUE((mock->execBuffer.flags & flag) == flag);
+    bo->setAddress(nullptr);
+}
+
+TEST_F(DrmBufferObjectTest, onPinBBhasOnlyBbEndAndNoForceNonCoherent) {
+    std::unique_ptr<uint32_t[]> buff(new uint32_t[1024]);
+    mock->ioctl_expected.total = 1;
+    mock->ioctl_res = 0;
+
+    mock->overideCoherencyPatchActive(false);
+    std::unique_ptr<BufferObject> boToPin(new TestedBufferObject(this->mock));
+    ASSERT_NE(nullptr, boToPin.get());
+
+    bo->setAddress(buff.get());
+    BufferObject *boArray[1] = {boToPin.get()};
+    auto ret = bo->pin(boArray, 1);
+    EXPECT_EQ(mock->ioctl_res, ret);
+    uint32_t bb_end = 0x05000000;
+    EXPECT_EQ(buff[0], bb_end);
+    EXPECT_GT(mock->execBuffer.batch_len, 0u);
+    uint32_t flag = I915_PRIVATE_EXEC_FORCE_NON_COHERENT;
+    EXPECT_TRUE((mock->execBuffer.flags & flag) == 0);
+    bo->setAddress(nullptr);
+}
+
 TEST_F(DrmBufferObjectTest, onPinIoctlFailed) {
     std::unique_ptr<uint32_t[]> buff(new uint32_t[1024]);
 

unit_tests/os_interface/linux/drm_mock.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017 - 2018, Intel Corporation
+ * Copyright (c) 2017, Intel Corporation
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -119,6 +119,10 @@ class Drm2 : public Drm {
                 return this->StoredRetVal;
             }
 #endif
+            if (gp->param == I915_PRIVATE_PARAM_HAS_EXEC_FORCE_NON_COHERENT) {
+                *((int *)(gp->value)) = this->StoredDisableCoherencyPatchActive;
+                return this->StoredRetVal;
+            }
             if (gp->param == I915_PARAM_HAS_ALIASING_PPGTT) {
                 *((int *)(gp->value)) = this->StoredPPGTT;
                 return this->StoredRetVal;
@@ -180,6 +184,8 @@ class Drm2 : public Drm {
         return 0;
     }
 
+    void overideCoherencyPatchActive(bool newCoherencyPatchActiveValue) { coherencyDisablePatchActive = newCoherencyPatchActiveValue; }
+
     void setSysFsDefaultGpuPath(const char *path) {
         sysFsDefaultGpuPathToRestore = sysFsDefaultGpuPath;
         sysFsDefaultGpuPath = path;
@@ -238,6 +244,7 @@ class Drm2 : public Drm {
     int StoredRetValForDeviceRevID = 0;
     int StoredRetValForPooledEU = 0;
     int StoredRetValForMinEUinPool = 0;
+    int StoredDisableCoherencyPatchActive = 1;
     int StoredPPGTT = 3;
     int StoredPreemptionSupport = 1;
     int StoredMockPreemptionSupport = 0;

unit_tests/os_interface/linux/drm_tests.cpp

@@ -131,6 +131,46 @@ TEST(DrmTest, GetRevisionID) {
     delete pDrm;
 }
 
+TEST(DrmTest, GivenMockDrmWhenAskedForCoherencyStatusThenProperBitIsSet) {
+    Drm2 *pDrm = new Drm2;
+    EXPECT_NE(nullptr, pDrm);
+
+    EXPECT_FALSE(pDrm->peekCoherencyDisablePatchActive());
+
+    pDrm->obtainCoherencyDisablePatchActive();
+
+    EXPECT_TRUE(pDrm->peekCoherencyDisablePatchActive());
+    delete pDrm;
+}
+
+TEST(DrmTest, GivenMockDrmWhenAskedForCoherencyStatusThatPassThenDisabledIsReturned) {
+    Drm2 *pDrm = new Drm2;
+    pDrm->StoredDisableCoherencyPatchActive = 0;
+    EXPECT_NE(nullptr, pDrm);
+
+    EXPECT_FALSE(pDrm->peekCoherencyDisablePatchActive());
+
+    pDrm->obtainCoherencyDisablePatchActive();
+
+    EXPECT_FALSE(pDrm->peekCoherencyDisablePatchActive());
+    pDrm->StoredDisableCoherencyPatchActive = 1;
+    delete pDrm;
+}
+
+TEST(DrmTest, GivenMockDrmWhenAskedForCoherencyStatusThatFailsThenFalseIsReturned) {
+    Drm2 *pDrm = new Drm2;
+    pDrm->StoredRetVal = -1;
+    EXPECT_NE(nullptr, pDrm);
+
+    EXPECT_FALSE(pDrm->peekCoherencyDisablePatchActive());
+
+    pDrm->obtainCoherencyDisablePatchActive();
+
+    EXPECT_FALSE(pDrm->peekCoherencyDisablePatchActive());
+    pDrm->StoredRetVal = 0;
+    delete pDrm;
+}
+
 TEST(DrmTest, GivenMockDrmWhenAskedFor48BitAddressCorrectValueReturned) {
     Drm2 *pDrm = new Drm2;
     pDrm->StoredPPGTT = 3;