Add named AArch64 FP register view

Author: YinMo19

README.md

@@ -235,7 +235,7 @@ iOS executable pages are code-signed. In normal (non-jailbreak) runtime environm
 - On `x86_64`, RIP-relative execute-original patch points are still unsupported (for example `lea` / `mov` using `[rip + disp]`).
 - `instrument_no_original(...)` skips original instruction unless callback changes control-flow register (`pc`/`rip`).
 - `HookContext` exposes FP/SIMD state in `ctx.fpregs`:
-  - `aarch64`: `fpregs.v[0..31]` / `fpsr` / `fpcr`
+  - `aarch64`: `fpregs.v[0..31]` or `fpregs.regs.named.v0..v31`, plus `fpsr` / `fpcr`
   - `x86_64`: x87 `st`, `xmm[0..15]`, `mxcsr`; Linux also maps `ymm` high halves when the signal frame carries AVX XSAVE state
 - `prepatched::*` APIs assume the address is already trap-patched offline (`brk`/`int3`) and do not write executable pages at runtime.
 - `prepatched::instrument(...)` needs original opcode metadata to execute original instruction (on `aarch64`, preload with `prepatched::cache_original_opcode(...)`).

examples/inline_hook_fpregs/main.rs

@@ -25,7 +25,7 @@ extern "C" fn replace_in_callback(_address: u64, ctx: *mut HookContext) {
     unsafe {
         #[cfg(target_arch = "aarch64")]
         {
-            (*ctx).fpregs.v[0] = u128::from_le_bytes(encode_i32x4([42, 43, 44, 45]));
+            (*ctx).fpregs.regs.named.v0 = u128::from_le_bytes(encode_i32x4([42, 43, 44, 45]));
         }
 
         #[cfg(all(target_arch = "x86_64", target_os = "macos"))]

src/context.rs

@@ -11,6 +11,9 @@
 //! This is also where FP/SIMD state is normalized across Darwin and Linux, including
 //! Linux x86_64 AVX high halves and Linux AArch64 FPSIMD extension records.
 
+#[cfg(target_arch = "aarch64")]
+use std::ops::{Deref, DerefMut};
+
 #[cfg(target_arch = "aarch64")]
 #[repr(C)]
 #[derive(Copy, Clone)]
@@ -59,12 +62,74 @@ pub union XRegisters {
 #[cfg(target_arch = "aarch64")]
 #[repr(C)]
 #[derive(Copy, Clone)]
-pub struct FpRegisters {
+pub struct VRegistersNamed {
+    pub v0: u128,
+    pub v1: u128,
+    pub v2: u128,
+    pub v3: u128,
+    pub v4: u128,
+    pub v5: u128,
+    pub v6: u128,
+    pub v7: u128,
+    pub v8: u128,
+    pub v9: u128,
+    pub v10: u128,
+    pub v11: u128,
+    pub v12: u128,
+    pub v13: u128,
+    pub v14: u128,
+    pub v15: u128,
+    pub v16: u128,
+    pub v17: u128,
+    pub v18: u128,
+    pub v19: u128,
+    pub v20: u128,
+    pub v21: u128,
+    pub v22: u128,
+    pub v23: u128,
+    pub v24: u128,
+    pub v25: u128,
+    pub v26: u128,
+    pub v27: u128,
+    pub v28: u128,
+    pub v29: u128,
+    pub v30: u128,
+    pub v31: u128,
+}
+
+#[cfg(target_arch = "aarch64")]
+#[repr(C)]
+#[derive(Copy, Clone)]
+pub union VRegisters {
     pub v: [u128; 32],
+    pub named: VRegistersNamed,
+}
+
+#[cfg(target_arch = "aarch64")]
+#[repr(C)]
+#[derive(Copy, Clone)]
+pub struct FpRegisters {
+    pub regs: VRegisters,
     pub fpsr: u32,
     pub fpcr: u32,
 }
 
+#[cfg(target_arch = "aarch64")]
+impl Deref for FpRegisters {
+    type Target = VRegisters;
+
+    fn deref(&self) -> &Self::Target {
+        &self.regs
+    }
+}
+
+#[cfg(target_arch = "aarch64")]
+impl DerefMut for FpRegisters {
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.regs
+    }
+}
+
 #[cfg(target_arch = "aarch64")]
 #[repr(C)]
 #[derive(Copy, Clone)]
@@ -169,7 +234,11 @@ pub unsafe fn remap_ctx(uc: *mut libc::ucontext_t) -> *mut HookContext {
     // registers directly into `HookContext`.
     let mut fpregs = zeroed_fpregs();
     unsafe {
-        std::ptr::copy_nonoverlapping(ns.__v.as_ptr().cast::<u128>(), fpregs.v.as_mut_ptr(), 32);
+        std::ptr::copy_nonoverlapping(
+            ns.__v.as_ptr().cast::<u128>(),
+            fpregs.regs.v.as_mut_ptr(),
+            32,
+        );
     }
     fpregs.fpsr = ns.__fpsr;
     fpregs.fpcr = ns.__fpcr;
@@ -212,7 +281,7 @@ pub unsafe fn write_back_ctx(uc: *mut libc::ucontext_t, ctx: *mut HookContext) {
 
     unsafe {
         std::ptr::copy_nonoverlapping(
-            ctx.fpregs.v.as_ptr(),
+            ctx.fpregs.regs.v.as_ptr(),
             ns.__v.as_mut_ptr().cast::<u128>(),
             32,
         );
@@ -349,7 +418,7 @@ pub unsafe fn remap_ctx(uc: *mut libc::ucontext_t) -> *mut HookContext {
     // `HookContext`; FP/SIMD state simply remains zero-initialized in that case.
     if let Some(fpsimd) = unsafe { linux_aarch64_fpsimd_context(mcontext) } {
         let fpsimd = unsafe { &*fpsimd };
-        fpregs.v = fpsimd.vregs;
+        fpregs.regs.v = fpsimd.vregs;
         fpregs.fpsr = fpsimd.fpsr;
         fpregs.fpcr = fpsimd.fpcr;
     }
@@ -389,7 +458,7 @@ pub unsafe fn write_back_ctx(uc: *mut libc::ucontext_t, ctx: *mut HookContext) {
 
     if let Some(fpsimd) = unsafe { linux_aarch64_fpsimd_context(mcontext) } {
         let fpsimd = unsafe { &mut *fpsimd };
-        fpsimd.vregs = ctx.fpregs.v;
+        fpsimd.vregs = ctx.fpregs.regs.v;
         fpsimd.fpsr = ctx.fpregs.fpsr;
         fpsimd.fpcr = ctx.fpregs.fpcr;
     }
@@ -812,3 +881,27 @@ pub unsafe fn free_ctx(ctx: *mut HookContext) {
         let _ = unsafe { Box::from_raw(ctx) };
     }
 }
+
+#[cfg(all(test, target_arch = "aarch64"))]
+mod tests {
+    use super::{FpRegisters, VRegisters};
+
+    #[test]
+    fn aarch64_fpreg_named_and_array_views_alias() {
+        let mut fpregs = FpRegisters {
+            regs: VRegisters { v: [0; 32] },
+            fpsr: 0,
+            fpcr: 0,
+        };
+
+        unsafe {
+            fpregs.named.v0 = 0x11;
+            fpregs.named.v31 = 0x22;
+            assert_eq!(fpregs.v[0], 0x11);
+            assert_eq!(fpregs.v[31], 0x22);
+
+            fpregs.v[1] = 0x33;
+            assert_eq!(fpregs.named.v1, 0x33);
+        }
+    }
+}

src/lib.rs

@@ -37,7 +37,10 @@ mod trampoline;
 #[cfg(all(target_arch = "x86_64", any(target_os = "linux", target_os = "macos")))]
 pub use context::{FpRegisters, HookContext, InstrumentCallback};
 #[cfg(target_arch = "aarch64")]
-pub use context::{FpRegisters, HookContext, InstrumentCallback, XRegisters, XRegistersNamed};
+pub use context::{
+    FpRegisters, HookContext, InstrumentCallback, VRegisters, VRegistersNamed, XRegisters,
+    XRegistersNamed,
+};
 pub use error::SigHookError;
 
 /// Replaces one machine instruction at `address` with `new_opcode`.

src/replay.rs

@@ -548,16 +548,20 @@ fn write_w(ctx: &mut HookContext, reg: u8, value: u32) {
 /// Storing the 32-bit value as `u128` naturally leaves the upper 96 bits cleared,
 /// which matches AArch64 scalar FP load semantics.
 fn write_s(ctx: &mut HookContext, reg: u8, value: u32) {
-    if (reg as usize) < ctx.fpregs.v.len() {
-        ctx.fpregs.v[reg as usize] = value as u128;
+    if (reg as usize) < 32 {
+        unsafe {
+            ctx.fpregs.v[reg as usize] = value as u128;
+        }
     }
 }
 
 #[inline]
 /// Writes a scalar `dN` result into `vN`, clearing the high 64 bits.
 fn write_d(ctx: &mut HookContext, reg: u8, value: u64) {
-    if (reg as usize) < ctx.fpregs.v.len() {
-        ctx.fpregs.v[reg as usize] = value as u128;
+    if (reg as usize) < 32 {
+        unsafe {
+            ctx.fpregs.v[reg as usize] = value as u128;
+        }
     }
 }
 
@@ -567,8 +571,10 @@ fn write_d(ctx: &mut HookContext, reg: u8, value: u64) {
 /// `HookContext` stores vector registers as `u128`, so replay converts the raw bytes
 /// into the host integer representation once at the boundary.
 fn write_q(ctx: &mut HookContext, reg: u8, value: [u8; 16]) {
-    if (reg as usize) < ctx.fpregs.v.len() {
-        ctx.fpregs.v[reg as usize] = u128::from_le_bytes(value);
+    if (reg as usize) < 32 {
+        unsafe {
+            ctx.fpregs.v[reg as usize] = u128::from_le_bytes(value);
+        }
     }
 }
 
@@ -637,7 +643,7 @@ unsafe fn read_u128_bytes(address: u64) -> [u8; 16] {
 #[cfg(test)]
 mod tests {
     use super::{ReplayPlan, apply_replay_plan, decode_replay_plan};
-    use crate::context::{FpRegisters, HookContext, XRegisters};
+    use crate::context::{FpRegisters, HookContext, VRegisters, XRegisters};
 
     fn empty_ctx() -> HookContext {
         HookContext {
@@ -647,7 +653,7 @@ mod tests {
             cpsr: 0,
             pad: 0,
             fpregs: FpRegisters {
-                v: [0; 32],
+                regs: VRegisters { v: [0; 32] },
                 fpsr: 0,
                 fpcr: 0,
             },
@@ -818,7 +824,7 @@ mod tests {
             0x5000,
             4,
         ));
-        assert_eq!(ctx.fpregs.v[6], double as u128);
+        assert_eq!(unsafe { ctx.fpregs.v[6] }, double as u128);
         assert_eq!(ctx.pc, 0x5004);
 
         assert!(apply_replay_plan(
@@ -830,7 +836,7 @@ mod tests {
             0x6000,
             4,
         ));
-        assert_eq!(ctx.fpregs.v[7], u128::from_le_bytes(quad));
+        assert_eq!(unsafe { ctx.fpregs.v[7] }, u128::from_le_bytes(quad));
         assert_eq!(ctx.pc, 0x6004);
     }