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Modeler validation and sim_dict performance improvements
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+26
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1 file changed

+26
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tidy3d/plugins/smatrix/component_modelers/terminal.py

Lines changed: 26 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -223,15 +223,17 @@ def _warn_refactor_2_10(cls, values):
223223

224224
@property
225225
def _sim_with_sources(self) -> Simulation:
226-
"""Instance of :class:`.Simulation` with all sources and absorbers added for each port, for troubleshooting."""
226+
"""Instance of :class:`.Simulation` with all sources and absorbers added for each port, for plotting."""
227227

228228
sources = [port.to_source(self._source_time) for port in self.ports]
229229
absorbers = [
230230
port.to_absorber()
231231
for port in self.ports
232232
if isinstance(port, WavePort) and port.absorber
233233
]
234-
return self.simulation.updated_copy(sources=sources, internal_absorbers=absorbers)
234+
return self.simulation.updated_copy(
235+
sources=sources, internal_absorbers=absorbers, validate=False
236+
)
235237

236238
@equal_aspect
237239
@add_ax_if_none
@@ -382,18 +384,17 @@ def matrix_indices_run_sim(self) -> tuple[NetworkIndex, ...]:
382384
def sim_dict(self) -> SimulationMap:
383385
"""Generate all the :class:`.Simulation` objects for the port parameter calculation."""
384386

387+
# Check base simulation for grid size at ports
388+
TerminalComponentModeler._check_grid_size_at_ports(self.base_sim, self._lumped_ports)
389+
TerminalComponentModeler._check_grid_size_at_wave_ports(self.base_sim, self._wave_ports)
390+
385391
sim_dict = {}
386392
# Now, create simulations with wave port sources and mode solver monitors for computing port modes
387393
for network_index in self.matrix_indices_run_sim:
388394
task_name, sim_with_src = self._add_source_to_sim(network_index)
389395
# update simulation
390396
sim_dict[task_name] = sim_with_src
391397

392-
# Check final simulations for grid size at ports
393-
for _, sim in sim_dict.items():
394-
TerminalComponentModeler._check_grid_size_at_ports(sim, self._lumped_ports)
395-
TerminalComponentModeler._check_grid_size_at_wave_ports(sim, self._wave_ports)
396-
397398
return SimulationMap(keys=tuple(sim_dict.keys()), values=tuple(sim_dict.values()))
398399

399400
@cached_property
@@ -414,7 +415,10 @@ def _base_sim_no_radiation_monitors(self) -> Simulation:
414415

415416
# Make an initial simulation with new grid_spec to determine where LumpedPorts are snapped
416417
sim_wo_source = self.simulation.updated_copy(
417-
grid_spec=grid_spec, lumped_elements=lumped_resistors
418+
grid_spec=grid_spec,
419+
lumped_elements=lumped_resistors,
420+
validate=False,
421+
deep=False,
418422
)
419423
snap_centers = {}
420424
for port in self._lumped_ports:
@@ -480,7 +484,11 @@ def _base_sim_no_radiation_monitors(self) -> Simulation:
480484
)
481485

482486
# update base simulation with updated set of shared components
483-
sim_wo_source = sim_wo_source.copy(update=update_dict)
487+
sim_wo_source = sim_wo_source.updated_copy(
488+
**update_dict,
489+
validate=False,
490+
deep=False,
491+
)
484492

485493
# extrude port structures
486494
sim_wo_source = self._extrude_port_structures(sim=sim_wo_source)
@@ -527,7 +535,9 @@ def base_sim(self) -> Simulation:
527535
"""The base simulation with all components added, including radiation monitors."""
528536
base_sim_tmp = self._base_sim_no_radiation_monitors
529537
mnts_with_radiation = list(base_sim_tmp.monitors) + list(self._finalized_radiation_monitors)
530-
return base_sim_tmp.updated_copy(monitors=mnts_with_radiation)
538+
grid_spec = GridSpec.from_grid(base_sim_tmp.grid)
539+
# We skipped validations up to now, here we finally validate the base sim
540+
return base_sim_tmp.updated_copy(monitors=mnts_with_radiation, grid_spec=grid_spec)
531541

532542
def _generate_radiation_monitor(
533543
self, simulation: Simulation, auto_spec: DirectivityMonitorSpec
@@ -712,7 +722,10 @@ def _add_source_to_sim(self, source_index: NetworkIndex) -> tuple[str, Simulatio
712722
)
713723
task_name = self.get_task_name(port=port, mode_index=mode_index)
714724

715-
return (task_name, self.base_sim.updated_copy(sources=[port_source]))
725+
return (
726+
task_name,
727+
self.base_sim.updated_copy(sources=[port_source], validate=False, deep=False),
728+
)
716729

717730
@cached_property
718731
def _source_time(self):
@@ -958,6 +971,8 @@ def _extrude_port_structures(self, sim: Simulation) -> Simulation:
958971
sim = sim.updated_copy(
959972
grid_spec=GridSpec.from_grid(sim.grid),
960973
structures=[*sim.structures, *all_new_structures],
974+
validate=False,
975+
deep=False,
961976
)
962977

963978
return sim

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