4func-timer/clk_div_timer.v at main · devinchaky/4func-timer · GitHub

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 04/08/2023 01:07:44 PM
// Design Name:
// Module Name: clk_div_timer
// Project Name:
// Target Devices:
// Tool Versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////


module clk_div_timer(
    input clk,
    output slow_clk
    );

    reg[19:0] COUNT;

    assign slow_clk= COUNT[19]&COUNT[18]&COUNT[17]&COUNT[16];

    always @(posedge clk)
    begin
    if (slow_clk)
        COUNT = 0;
    else
        COUNT = COUNT +1;
    end

endmodule