Rebuild rocky8_10 with kernel-4.18.0-553.87.1.el8_10

Rebuild_History BUILDABLE
Rebuilding Kernel from rpm changelog with Fuzz Limit: 87.50%
Number of commits in upstream range v4.18~1..kernel-mainline: 581414
Number of commits in rpm: 21
Number of commits matched with upstream: 14 (66.67%)
Number of commits in upstream but not in rpm: 581400
Number of commits NOT found in upstream: 7 (33.33%)

Rebuilding Kernel on Branch rocky8_10_rebuild_kernel-4.18.0-553.87.1.el8_10 for kernel-4.18.0-553.87.1.el8_10
Clean Cherry Picks: 10 (71.43%)
Empty Cherry Picks: 4 (28.57%)
_______________________________

Full Details Located here:
ciq/ciq_backports/kernel-4.18.0-553.87.1.el8_10/rebuild.details.txt

Includes:
* git commit header above
* Empty Commits with upstream SHA
* RPM ChangeLog Entries that could not be matched

Individual Empty Commit failures contained in the same containing directory.
The git message for empty commits will have the path for the failed commit.
File names are the first 8 characters of the upstream SHA

Author: PlaidCat

Makefile.rhelver

@@ -12,7 +12,7 @@ RHEL_MINOR = 10
 #
 # Use this spot to avoid future merge conflicts.
 # Do not trim this comment.
-RHEL_RELEASE = 553.85.1
+RHEL_RELEASE = 553.87.1
 
 #
 # ZSTREAM

arch/powerpc/include/asm/cputable.h

@@ -486,6 +486,9 @@ static inline void cpu_feature_keys_init(void) { }
 	    CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_ARCH_207S | \
 	    CPU_FTR_ARCH_300 | CPU_FTR_PKEY | \
 	    CPU_FTR_ARCH_31 | CPU_FTR_DAWR | CPU_FTR_DAWR1)
+
+#define CPU_FTRS_POWER11	CPU_FTRS_POWER10
+
 #define CPU_FTRS_CELL	(CPU_FTR_LWSYNC | \
 	    CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
 	    CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \

arch/powerpc/include/asm/mmu.h

@@ -125,6 +125,7 @@
 #define MMU_FTRS_POWER8		MMU_FTRS_POWER6
 #define MMU_FTRS_POWER9		MMU_FTRS_POWER6
 #define MMU_FTRS_POWER10	MMU_FTRS_POWER6
+#define MMU_FTRS_POWER11	MMU_FTRS_POWER6
 #define MMU_FTRS_CELL		MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
 				MMU_FTR_CI_LARGE_PAGE
 #define MMU_FTRS_PA6T		MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \

arch/powerpc/include/asm/reg.h

@@ -1346,6 +1346,7 @@
 #define PVR_POWER8	0x004D
 #define PVR_POWER9	0x004E
 #define PVR_POWER10	0x0080
+#define PVR_POWER11	0x0082
 #define PVR_BE		0x0070
 #define PVR_PA6T	0x0090
 
@@ -1357,6 +1358,7 @@
 #define PVR_ARCH_207	0x0f000004
 #define PVR_ARCH_300	0x0f000005
 #define PVR_ARCH_31	0x0f000006
+#define PVR_ARCH_31_P11	0x0f000007
 
 /* Macros for setting and retrieving special purpose registers */
 #ifndef __ASSEMBLY__

arch/powerpc/kernel/cputable.c

@@ -130,6 +130,10 @@ extern void __restore_cpu_e6500(void);
 				 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \
 				 PPC_FEATURE2_VEC_CRYPTO)
 
+#define COMMON_USER_POWER11	COMMON_USER_POWER10
+#define COMMON_USER2_POWER11	COMMON_USER2_POWER10
+
+
 #ifdef CONFIG_PPC_BOOK3E_64
 #define COMMON_USER_BOOKE	(COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
 #else
@@ -393,6 +397,20 @@ static struct cpu_spec __initdata cpu_specs[] = {
 		.cpu_restore		= __restore_cpu_power10,
 		.platform		= "power10",
 	},
+	{       /* 3.1-compliant processor, i.e. Power11 "architected" mode */
+		.pvr_mask               = 0xffffffff,
+		.pvr_value              = 0x0f000007,
+		.cpu_name               = "Power11 (architected)",
+		.cpu_features           = CPU_FTRS_POWER11,
+		.cpu_user_features      = COMMON_USER_POWER11,
+		.cpu_user_features2     = COMMON_USER2_POWER11,
+		.mmu_features           = MMU_FTRS_POWER11,
+		.icache_bsize           = 128,
+		.dcache_bsize           = 128,
+		.cpu_setup              = __setup_cpu_power10,
+		.cpu_restore            = __restore_cpu_power10,
+		.platform               = "power11",
+	},
 	{	/* Power7 */
 		.pvr_mask		= 0xffff0000,
 		.pvr_value		= 0x003f0000,
@@ -583,6 +601,23 @@ static struct cpu_spec __initdata cpu_specs[] = {
 		.machine_check_early	= __machine_check_early_realmode_p10,
 		.platform		= "power10",
 	},
+	{       /* Power11 */
+		.pvr_mask		= 0xffff0000,
+		.pvr_value		= 0x00820000,
+		.cpu_name		= "Power11 (raw)",
+		.cpu_features		= CPU_FTRS_POWER11,
+		.cpu_user_features	= COMMON_USER_POWER11,
+		.cpu_user_features2	= COMMON_USER2_POWER11,
+		.mmu_features		= MMU_FTRS_POWER11,
+		.icache_bsize		= 128,
+		.dcache_bsize		= 128,
+		.num_pmcs		= 6,
+		.pmc_type		= PPC_PMC_IBM,
+		.cpu_setup		= __setup_cpu_power10,
+		.cpu_restore		= __restore_cpu_power10,
+		.machine_check_early	= __machine_check_early_realmode_p10,
+		.platform		= "power11",
+	},
 	{	/* Cell Broadband Engine */
 		.pvr_mask		= 0xffff0000,
 		.pvr_value		= 0x00700000,

arch/powerpc/kernel/dt_cpu_ftrs.c

@@ -484,6 +484,14 @@ static int __init feat_enable_mce_power10(struct dt_cpu_feature *f)
 	return 1;
 }
 
+static int __init feat_enable_mce_power11(struct dt_cpu_feature *f)
+{
+	cur_cpu_spec->platform = "power11";
+	cur_cpu_spec->machine_check_early = __machine_check_early_realmode_p10;
+
+	return 1;
+}
+
 static int __init feat_enable_tm(struct dt_cpu_feature *f)
 {
 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
@@ -673,8 +681,10 @@ static struct dt_cpu_feature_match __initdata
 	{"pc-relative-addressing", feat_enable, 0},
 	{"machine-check-power9", feat_enable_mce_power9, 0},
 	{"machine-check-power10", feat_enable_mce_power10, 0},
+	{"machine-check-power11", feat_enable_mce_power11, 0},
 	{"performance-monitor-power9", feat_enable_pmu_power9, 0},
 	{"performance-monitor-power10", feat_enable_pmu_power10, 0},
+	{"performance-monitor-power11", feat_enable_pmu_power10, 0},
 	{"event-based-branch-v3", feat_enable, 0},
 	{"random-number-generator", feat_enable, 0},
 	{"system-call-vectored", feat_disable, 0},

arch/powerpc/kernel/prom_init.c

@@ -219,6 +219,7 @@ static int __prombss mem_reserve_cnt;
 static cell_t __prombss regbuf[1024];
 
 static bool  __prombss rtas_has_query_cpu_stopped;
+static int __prombss enable_p11_val;
 
 
 /*
@@ -816,6 +817,15 @@ static void __init early_cmdline_parse(void)
 		} else
 			prom_radix_disable = true;
 	}
+
+	opt = prom_strstr(prom_cmd_line, "enable_p11");
+	if (opt) {
+		opt += 12;
+		enable_p11_val = 1;
+	} else {
+		enable_p11_val = 0;
+	}
+
 	if (prom_radix_disable)
 		prom_debug("Radix disabled from cmdline\n");
 
@@ -922,7 +932,7 @@ struct option_vector6 {
 } __packed;
 
 struct ibm_arch_vec {
-	struct { u32 mask, val; } pvrs[14];
+	struct { u32 mask, val; } pvrs[16];
 
 	u8 num_vectors;
 
@@ -979,6 +989,14 @@ static const struct ibm_arch_vec ibm_architecture_vec_template __initconst = {
 			.mask = cpu_to_be32(0xffff0000), /* POWER10 */
 			.val  = cpu_to_be32(0x00800000),
 		},
+		{
+			.mask = cpu_to_be32(0xffff0000), /* POWER11 */
+			.val  = cpu_to_be32(0x00820000),
+		},
+		{
+			.mask = cpu_to_be32(0xffffffff), /* P11 compliant */
+			.val  = cpu_to_be32(0x0f000007),
+		},
 		{
 			.mask = cpu_to_be32(0xffffffff), /* all 3.1-compliant */
 			.val  = cpu_to_be32(0x0f000006),
@@ -1308,10 +1326,19 @@ static void __init prom_check_platform_support(void)
 	};
 	int prop_len = prom_getproplen(prom.chosen,
 				       "ibm,arch-vec-5-platform-support");
+	int i;
 
 	/* First copy the architecture vec template */
 	ibm_architecture_vec = ibm_architecture_vec_template;
 
+	if (!enable_p11_val) {
+		for (i=0;i<16; i++) {
+			if ((ibm_architecture_vec.pvrs[i].val == cpu_to_be32(0x0f000007)) ||
+			    (ibm_architecture_vec.pvrs[i].val == cpu_to_be32(0x00820000)))
+				ibm_architecture_vec.pvrs[i].val = 0x0;
+		}
+	}
+
 	if (prop_len > 1) {
 		int i;
 		u8 vec[prop_len];

arch/powerpc/kvm/book3s_hv.c

@@ -389,6 +389,7 @@ static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat)
 			guest_pcr_bit = PCR_ARCH_300;
 			break;
 		case PVR_ARCH_31:
+		case PVR_ARCH_31_P11:
 			guest_pcr_bit = PCR_ARCH_31;
 			break;
 		default:

ciq/ciq_backports/kernel-4.18.0-553.87.1.el8_10/rebuild.details.txt

@@ -0,0 +1,27 @@
+Rebuild_History BUILDABLE
+Rebuilding Kernel from rpm changelog with Fuzz Limit: 87.50%
+Number of commits in upstream range v4.18~1..kernel-mainline: 581414
+Number of commits in rpm: 21
+Number of commits matched with upstream: 14 (66.67%)
+Number of commits in upstream but not in rpm: 581400
+Number of commits NOT found in upstream: 7 (33.33%)
+
+Rebuilding Kernel on Branch rocky8_10_rebuild_kernel-4.18.0-553.87.1.el8_10 for kernel-4.18.0-553.87.1.el8_10
+Clean Cherry Picks: 10 (71.43%)
+Empty Cherry Picks: 4 (28.57%)
+_______________________________
+
+__EMPTY COMMITS__________________________
+c2ed087ed35ca569d8179924ba560be248c758e5 powerpc: Add Power11 architected and raw mode
+0af1561b2d60bab2a2b00720a5c7b292ecc549ec smb: client: fix race with concurrent opens in unlink(2)
+d84291fc7453df7881a970716f8256273aca5747 smb: client: fix race with concurrent opens in rename(2)
+d613f53c83ec47089c4e25859d5e8e0359f6f8da mm/memory-failure: fix VM_BUG_ON_PAGE(PagePoisoned(page)) when unpoison memory
+
+__CHANGES NOT IN UPSTREAM________________
+Adding prod certs and changed cert date to 20210620
+Adding Rocky secure boot certs
+Fixing vmlinuz removal
+Fixing UEFI CA path
+Porting to 8.10, debranding and Rocky branding
+Fixing pesign_key_name values
+arch/powerpc: commandline option to enable P11 support