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Heikki Krogerusgregkh
Heikki Krogerus
authored and
gregkh
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usb: dwc3: pci: Sort out the Intel device IDs
commit 46b28d2 upstream. The PCI device IDs were organised based on the Intel architecture generation in most cases, but not with every ID. That left the device ID table with no real order. Sorting the table based on the device ID. Suggested-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> Cc: stable <stable@kernel.org> Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://patch.msgid.link/20251107121548.2702900-1-heikki.krogerus@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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‎drivers/usb/dwc3/dwc3-pci.c‎

Lines changed: 41 additions & 41 deletions
Original file line numberDiff line numberDiff line change
@@ -21,41 +21,41 @@
2121
#include <linux/acpi.h>
2222
#include <linux/delay.h>
2323

24+
#define PCI_DEVICE_ID_INTEL_CMLLP 0x02ee
25+
#define PCI_DEVICE_ID_INTEL_CMLH 0x06ee
26+
#define PCI_DEVICE_ID_INTEL_BXT 0x0aaa
2427
#define PCI_DEVICE_ID_INTEL_BYT 0x0f37
2528
#define PCI_DEVICE_ID_INTEL_MRFLD 0x119e
26-
#define PCI_DEVICE_ID_INTEL_BSW 0x22b7
27-
#define PCI_DEVICE_ID_INTEL_SPTLP 0x9d30
28-
#define PCI_DEVICE_ID_INTEL_SPTH 0xa130
29-
#define PCI_DEVICE_ID_INTEL_BXT 0x0aaa
3029
#define PCI_DEVICE_ID_INTEL_BXT_M 0x1aaa
31-
#define PCI_DEVICE_ID_INTEL_APL 0x5aaa
32-
#define PCI_DEVICE_ID_INTEL_KBP 0xa2b0
33-
#define PCI_DEVICE_ID_INTEL_CMLLP 0x02ee
34-
#define PCI_DEVICE_ID_INTEL_CMLH 0x06ee
30+
#define PCI_DEVICE_ID_INTEL_BSW 0x22b7
3531
#define PCI_DEVICE_ID_INTEL_GLK 0x31aa
36-
#define PCI_DEVICE_ID_INTEL_CNPLP 0x9dee
37-
#define PCI_DEVICE_ID_INTEL_CNPH 0xa36e
38-
#define PCI_DEVICE_ID_INTEL_CNPV 0xa3b0
3932
#define PCI_DEVICE_ID_INTEL_ICLLP 0x34ee
40-
#define PCI_DEVICE_ID_INTEL_EHL 0x4b7e
41-
#define PCI_DEVICE_ID_INTEL_TGPLP 0xa0ee
4233
#define PCI_DEVICE_ID_INTEL_TGPH 0x43ee
43-
#define PCI_DEVICE_ID_INTEL_JSP 0x4dee
44-
#define PCI_DEVICE_ID_INTEL_WCL 0x4d7e
4534
#define PCI_DEVICE_ID_INTEL_ADL 0x460e
46-
#define PCI_DEVICE_ID_INTEL_ADL_PCH 0x51ee
4735
#define PCI_DEVICE_ID_INTEL_ADLN 0x465e
36+
#define PCI_DEVICE_ID_INTEL_EHL 0x4b7e
37+
#define PCI_DEVICE_ID_INTEL_WCL 0x4d7e
38+
#define PCI_DEVICE_ID_INTEL_JSP 0x4dee
39+
#define PCI_DEVICE_ID_INTEL_ADL_PCH 0x51ee
4840
#define PCI_DEVICE_ID_INTEL_ADLN_PCH 0x54ee
49-
#define PCI_DEVICE_ID_INTEL_ADLS 0x7ae1
50-
#define PCI_DEVICE_ID_INTEL_RPL 0xa70e
41+
#define PCI_DEVICE_ID_INTEL_APL 0x5aaa
42+
#define PCI_DEVICE_ID_INTEL_NVLS_PCH 0x6e6f
43+
#define PCI_DEVICE_ID_INTEL_ARLH_PCH 0x777e
5144
#define PCI_DEVICE_ID_INTEL_RPLS 0x7a61
45+
#define PCI_DEVICE_ID_INTEL_MTL 0x7e7e
46+
#define PCI_DEVICE_ID_INTEL_ADLS 0x7ae1
5247
#define PCI_DEVICE_ID_INTEL_MTLM 0x7eb1
5348
#define PCI_DEVICE_ID_INTEL_MTLP 0x7ec1
5449
#define PCI_DEVICE_ID_INTEL_MTLS 0x7f6f
55-
#define PCI_DEVICE_ID_INTEL_MTL 0x7e7e
56-
#define PCI_DEVICE_ID_INTEL_NVLS_PCH 0x6e6f
57-
#define PCI_DEVICE_ID_INTEL_ARLH_PCH 0x777e
5850
#define PCI_DEVICE_ID_INTEL_TGL 0x9a15
51+
#define PCI_DEVICE_ID_INTEL_SPTLP 0x9d30
52+
#define PCI_DEVICE_ID_INTEL_CNPLP 0x9dee
53+
#define PCI_DEVICE_ID_INTEL_TGPLP 0xa0ee
54+
#define PCI_DEVICE_ID_INTEL_SPTH 0xa130
55+
#define PCI_DEVICE_ID_INTEL_KBP 0xa2b0
56+
#define PCI_DEVICE_ID_INTEL_CNPH 0xa36e
57+
#define PCI_DEVICE_ID_INTEL_CNPV 0xa3b0
58+
#define PCI_DEVICE_ID_INTEL_RPL 0xa70e
5959
#define PCI_DEVICE_ID_INTEL_PTLH 0xe332
6060
#define PCI_DEVICE_ID_INTEL_PTLH_PCH 0xe37e
6161
#define PCI_DEVICE_ID_INTEL_PTLU 0xe432
@@ -413,41 +413,41 @@ static void dwc3_pci_remove(struct pci_dev *pci)
413413
}
414414

415415
static const struct pci_device_id dwc3_pci_id_table[] = {
416-
{ PCI_DEVICE_DATA(INTEL, BSW, &dwc3_pci_intel_swnode) },
417-
{ PCI_DEVICE_DATA(INTEL, BYT, &dwc3_pci_intel_byt_swnode) },
418-
{ PCI_DEVICE_DATA(INTEL, MRFLD, &dwc3_pci_intel_mrfld_swnode) },
419416
{ PCI_DEVICE_DATA(INTEL, CMLLP, &dwc3_pci_intel_swnode) },
420417
{ PCI_DEVICE_DATA(INTEL, CMLH, &dwc3_pci_intel_swnode) },
421-
{ PCI_DEVICE_DATA(INTEL, SPTLP, &dwc3_pci_intel_swnode) },
422-
{ PCI_DEVICE_DATA(INTEL, SPTH, &dwc3_pci_intel_swnode) },
423418
{ PCI_DEVICE_DATA(INTEL, BXT, &dwc3_pci_intel_swnode) },
419+
{ PCI_DEVICE_DATA(INTEL, BYT, &dwc3_pci_intel_byt_swnode) },
420+
{ PCI_DEVICE_DATA(INTEL, MRFLD, &dwc3_pci_intel_mrfld_swnode) },
424421
{ PCI_DEVICE_DATA(INTEL, BXT_M, &dwc3_pci_intel_swnode) },
425-
{ PCI_DEVICE_DATA(INTEL, APL, &dwc3_pci_intel_swnode) },
426-
{ PCI_DEVICE_DATA(INTEL, KBP, &dwc3_pci_intel_swnode) },
422+
{ PCI_DEVICE_DATA(INTEL, BSW, &dwc3_pci_intel_swnode) },
427423
{ PCI_DEVICE_DATA(INTEL, GLK, &dwc3_pci_intel_swnode) },
428-
{ PCI_DEVICE_DATA(INTEL, CNPLP, &dwc3_pci_intel_swnode) },
429-
{ PCI_DEVICE_DATA(INTEL, CNPH, &dwc3_pci_intel_swnode) },
430-
{ PCI_DEVICE_DATA(INTEL, CNPV, &dwc3_pci_intel_swnode) },
431424
{ PCI_DEVICE_DATA(INTEL, ICLLP, &dwc3_pci_intel_swnode) },
432-
{ PCI_DEVICE_DATA(INTEL, EHL, &dwc3_pci_intel_swnode) },
433-
{ PCI_DEVICE_DATA(INTEL, TGPLP, &dwc3_pci_intel_swnode) },
434425
{ PCI_DEVICE_DATA(INTEL, TGPH, &dwc3_pci_intel_swnode) },
435-
{ PCI_DEVICE_DATA(INTEL, JSP, &dwc3_pci_intel_swnode) },
436-
{ PCI_DEVICE_DATA(INTEL, WCL, &dwc3_pci_intel_swnode) },
437426
{ PCI_DEVICE_DATA(INTEL, ADL, &dwc3_pci_intel_swnode) },
438-
{ PCI_DEVICE_DATA(INTEL, ADL_PCH, &dwc3_pci_intel_swnode) },
439427
{ PCI_DEVICE_DATA(INTEL, ADLN, &dwc3_pci_intel_swnode) },
428+
{ PCI_DEVICE_DATA(INTEL, EHL, &dwc3_pci_intel_swnode) },
429+
{ PCI_DEVICE_DATA(INTEL, WCL, &dwc3_pci_intel_swnode) },
430+
{ PCI_DEVICE_DATA(INTEL, JSP, &dwc3_pci_intel_swnode) },
431+
{ PCI_DEVICE_DATA(INTEL, ADL_PCH, &dwc3_pci_intel_swnode) },
440432
{ PCI_DEVICE_DATA(INTEL, ADLN_PCH, &dwc3_pci_intel_swnode) },
441-
{ PCI_DEVICE_DATA(INTEL, ADLS, &dwc3_pci_intel_swnode) },
442-
{ PCI_DEVICE_DATA(INTEL, RPL, &dwc3_pci_intel_swnode) },
433+
{ PCI_DEVICE_DATA(INTEL, APL, &dwc3_pci_intel_swnode) },
434+
{ PCI_DEVICE_DATA(INTEL, NVLS_PCH, &dwc3_pci_intel_swnode) },
435+
{ PCI_DEVICE_DATA(INTEL, ARLH_PCH, &dwc3_pci_intel_swnode) },
443436
{ PCI_DEVICE_DATA(INTEL, RPLS, &dwc3_pci_intel_swnode) },
437+
{ PCI_DEVICE_DATA(INTEL, MTL, &dwc3_pci_intel_swnode) },
438+
{ PCI_DEVICE_DATA(INTEL, ADLS, &dwc3_pci_intel_swnode) },
444439
{ PCI_DEVICE_DATA(INTEL, MTLM, &dwc3_pci_intel_swnode) },
445440
{ PCI_DEVICE_DATA(INTEL, MTLP, &dwc3_pci_intel_swnode) },
446-
{ PCI_DEVICE_DATA(INTEL, MTL, &dwc3_pci_intel_swnode) },
447-
{ PCI_DEVICE_DATA(INTEL, NVLS_PCH, &dwc3_pci_intel_swnode) },
448441
{ PCI_DEVICE_DATA(INTEL, MTLS, &dwc3_pci_intel_swnode) },
449-
{ PCI_DEVICE_DATA(INTEL, ARLH_PCH, &dwc3_pci_intel_swnode) },
450442
{ PCI_DEVICE_DATA(INTEL, TGL, &dwc3_pci_intel_swnode) },
443+
{ PCI_DEVICE_DATA(INTEL, SPTLP, &dwc3_pci_intel_swnode) },
444+
{ PCI_DEVICE_DATA(INTEL, CNPLP, &dwc3_pci_intel_swnode) },
445+
{ PCI_DEVICE_DATA(INTEL, TGPLP, &dwc3_pci_intel_swnode) },
446+
{ PCI_DEVICE_DATA(INTEL, SPTH, &dwc3_pci_intel_swnode) },
447+
{ PCI_DEVICE_DATA(INTEL, KBP, &dwc3_pci_intel_swnode) },
448+
{ PCI_DEVICE_DATA(INTEL, CNPH, &dwc3_pci_intel_swnode) },
449+
{ PCI_DEVICE_DATA(INTEL, CNPV, &dwc3_pci_intel_swnode) },
450+
{ PCI_DEVICE_DATA(INTEL, RPL, &dwc3_pci_intel_swnode) },
451451
{ PCI_DEVICE_DATA(INTEL, PTLH, &dwc3_pci_intel_swnode) },
452452
{ PCI_DEVICE_DATA(INTEL, PTLH_PCH, &dwc3_pci_intel_swnode) },
453453
{ PCI_DEVICE_DATA(INTEL, PTLU, &dwc3_pci_intel_swnode) },

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