Skip to content

Commit 3be7e68

Browse files
committed
wifi: brcmfmac: Make read-only array cfg_offset static const
JIRA: https://issues.redhat.com/browse/RHEL-114891 commit 9410e28 Author: Colin Ian King <colin.i.king@gmail.com> Date: Thu Jun 19 09:25:54 2025 +0100 wifi: brcmfmac: Make read-only array cfg_offset static const Don't populate the read-only array cfg_offset on the stack at run time, instead make it static const. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Acked-by: Arend van Spriel <arend.vanspriel@broadcom.com> Link: https://patch.msgid.link/20250619082554.1834654-1-colin.i.king@gmail.com Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Jose Ignacio Tornos Martinez <jtornosm@redhat.com>
1 parent a94f95f commit 3be7e68

File tree

1 file changed

+13
-11
lines changed
  • drivers/net/wireless/broadcom/brcm80211/brcmfmac

1 file changed

+13
-11
lines changed

drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c

Lines changed: 13 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -654,17 +654,19 @@ brcmf_pcie_select_core(struct brcmf_pciedev_info *devinfo, u16 coreid)
654654
static void brcmf_pcie_reset_device(struct brcmf_pciedev_info *devinfo)
655655
{
656656
struct brcmf_core *core;
657-
u16 cfg_offset[] = { BRCMF_PCIE_CFGREG_STATUS_CMD,
658-
BRCMF_PCIE_CFGREG_PM_CSR,
659-
BRCMF_PCIE_CFGREG_MSI_CAP,
660-
BRCMF_PCIE_CFGREG_MSI_ADDR_L,
661-
BRCMF_PCIE_CFGREG_MSI_ADDR_H,
662-
BRCMF_PCIE_CFGREG_MSI_DATA,
663-
BRCMF_PCIE_CFGREG_LINK_STATUS_CTRL2,
664-
BRCMF_PCIE_CFGREG_RBAR_CTRL,
665-
BRCMF_PCIE_CFGREG_PML1_SUB_CTRL1,
666-
BRCMF_PCIE_CFGREG_REG_BAR2_CONFIG,
667-
BRCMF_PCIE_CFGREG_REG_BAR3_CONFIG };
657+
static const u16 cfg_offset[] = {
658+
BRCMF_PCIE_CFGREG_STATUS_CMD,
659+
BRCMF_PCIE_CFGREG_PM_CSR,
660+
BRCMF_PCIE_CFGREG_MSI_CAP,
661+
BRCMF_PCIE_CFGREG_MSI_ADDR_L,
662+
BRCMF_PCIE_CFGREG_MSI_ADDR_H,
663+
BRCMF_PCIE_CFGREG_MSI_DATA,
664+
BRCMF_PCIE_CFGREG_LINK_STATUS_CTRL2,
665+
BRCMF_PCIE_CFGREG_RBAR_CTRL,
666+
BRCMF_PCIE_CFGREG_PML1_SUB_CTRL1,
667+
BRCMF_PCIE_CFGREG_REG_BAR2_CONFIG,
668+
BRCMF_PCIE_CFGREG_REG_BAR3_CONFIG
669+
};
668670
u32 i;
669671
u32 val;
670672
u32 lsc;

0 commit comments

Comments
 (0)