Commit 0c9547e
net: renesas: rswitch: fix race window between tx start and complete
If hardware is already transmitting, it can start handling the
descriptor being written to immediately after it observes updated DT
field, before the queue is kicked by a write to GWTRC.
If the start_xmit() execution is preempted at unfortunate moment, this
transmission can complete, and interrupt handled, before gq->cur gets
updated. With the current implementation of completion, this will cause
the last entry not completed.
Fix that by changing completion loop to check DT values directly, instead
of depending on gq->cur.
Fixes: 3590918 ("net: ethernet: renesas: Add support for "Ethernet Switch"")
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://patch.msgid.link/20241208095004.69468-3-nikita.yoush@cogentembedded.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>1 parent 5cb0999 commit 0c9547e
1 file changed
+8
-8
lines changed| Original file line number | Diff line number | Diff line change | |
|---|---|---|---|
| |||
862 | 862 | | |
863 | 863 | | |
864 | 864 | | |
865 | | - | |
866 | | - | |
867 | | - | |
868 | | - | |
869 | | - | |
870 | | - | |
| 865 | + | |
| 866 | + | |
871 | 867 | | |
| 868 | + | |
872 | 869 | | |
873 | 870 | | |
874 | 871 | | |
| |||
879 | 876 | | |
880 | 877 | | |
881 | 878 | | |
| 879 | + | |
882 | 880 | | |
| 881 | + | |
| 882 | + | |
883 | 883 | | |
884 | 884 | | |
885 | 885 | | |
| |||
1685 | 1685 | | |
1686 | 1686 | | |
1687 | 1687 | | |
| 1688 | + | |
| 1689 | + | |
1688 | 1690 | | |
1689 | 1691 | | |
1690 | 1692 | | |
| |||
1695 | 1697 | | |
1696 | 1698 | | |
1697 | 1699 | | |
1698 | | - | |
1699 | | - | |
1700 | 1700 | | |
1701 | 1701 | | |
1702 | 1702 | | |
| |||
0 commit comments