QAQC Initial Plan

[hswanson13]

I have started an outline of our QAQC plan in this markdown.

See the full plan here: QAQC Plan

[hswanson13]

Post Meeting Notes

MUX64 Readout Test (3 in Plan)

• VTEMP
  - We are waiting on fully populated hybrids with a baseplate to measure the ETROC temperature in room temp while operating. This it to make sure we can be certain the ETROC is not exceeding 50C during QC testing
  - We will measure VTEMP on a disconnected line, this is to just set a loose threshold around VTEMP [Bobby and Joshua]
• VREF
  - Ted says it should be +/- 1% around the mean, we are going to grab some statistics to see what our mean is and the variation, hopefully 1% is completely reasonable!
  - We will measure VREF (conv not ADC) multiple times on the same RB [Hayden]
  - We will measure VREF across RBs (and modules?) [Bobby and Joshua]

Module (Wirebond?) Connectivity Tests (4 in Plan)

We began a discussion about trying to exercise every wire bond. The test could be confusing for a user if we call it wire bond connectivity. Because a connection issue could arise but it might not at all be wire bond related.

Maybe it makes sense to understand what each wire bond is used for. Make a test that exercises those functionalities, if it fails we say X functionality failed. Then a user can make a decision on how to diagnose the problem.

Tasks

• I think we still want to map functions to wirebonds on the module, if feasable (Ask Alex and Seb. for input!) [Bobby and Joshua]

[hswanson13]

Notes on the MUX64 readout:

the penable, LV_RB, GROUND pins we can ask the RBF engineers
PTATs we can just have a wide range of 0 to 300V