Update FAQs.md (#331)

* Update FAQs.md

added a few more general FAQs

* Update FAQs.md

Author: AWSGH

FAQs.md

@@ -19,11 +19,70 @@
 
 ## General
 
-**Q: What is included in the HDK?**
+**Q: How is developing a FPGA design for the cloud different from the common practice outside the cloud?**
 
-The HDK includes the following major components::
+AWS designed its FPGA instances to provide a developer experience with ease of use and as similar as possible to on-premises development environment with the following differences (advantages):
 
-1) Documentation for the Shell interface and other Custom Logic implementation guidelines, the Shell code needed for Custom Logic development, simulation models for the Shell, software for exercising.
+
+- Developers don’t need to purchase / design / bringup or debug the physical hardware where the FPGA is hosted, nor the platform/server hardware: all the hardware is verified, monitored, and maintained by AWS.
+
+- AWS provides an [FPGA Developer AMI](https://aws.amazon.com/marketplace/pp/B06VVYBLZZ) that contains Xilinx Vivado development environment, with all the needed licenses. By using the FPGA developer AMI developers have a choice to a wide range of instance (different CPU and Memory configutation) allowing developers to optimize their development flow.
+
+- AWS provides cloud based debug tools: [Virtual JTAG](./hdk/docs/Virtual_JTAG_XVC.md) which is equivalent to debug using JTAG with on-premise development, and Virtual LED together with Virtual DIP Switch emulation the LED and DIP switches in typical development board.
+
+- For developers who want to develop on-premises, Xilinx provides an [on-premises license](./hdk/docs/on_premise_licensing_help.md ) that matches all the needed components needed to be licensed for F1 development on premises. 
+
+- The developers' output is a Design Checkpoint (DCP) and not an FPGA bitstream: The FPGA bitstream is actually generated by AWS after the developer submits the DCP.
+
+- The FPGA in AWS platforms are loaded using "Partial Reconfiguration" mode.
+  
+
+**Q: What is the extra time needed to develop on AWS FPGA instances compared with on-premises development?**
+
+There are two parts to answerthis question:
+  
+  
+- A one-time knowledge ramp how to use AWS and FPGA on AWS: 
+
+For developers that are familiar with AWS, there is almost no additional time to get right into F1 development environment, as long as the documentation and guidances in the [FPGA HDK/SDK](https://github.com/aws/aws-fpga) are followed. 
+
+For developers who are new to AWS, there is typically a one to two days ramp on AWS general topics such as launching EC2 instance, setting up S3 storage and its permissions, using AWS console, etc… For new developers to AWS, we recommend to start with the [FPGA Developer Forum](https://forums.aws.amazon.com/ann.jspa?annID=4448)
+  
+  
+- On-going development flow: 
+
+Once developers complete their DCP, they submit the design through an AWS EC2 API to create the Amazon FGPA Image (aka AFI, this API call can take a few hours to complete, and the status of the process is reported in the S3 log bucket provides by the developers. AWS is working to improve the turn time of AFI generation.
+  
+  
+**Q: What new skill sets will be requiered from an FPGA developer in the cloud?**
+
+As AWS has taken all the non-differentiating, heavy lifting of hardware design, debug and implementation of the DRAM and PCI-express, as well as setting up the server platform pieces; AWS FPGA developers can focus on their own differentiating logic, instead of spending time on hardware bringup/debug and maintenance.
+
+On the business side, AWS Marketplace (MP) provides FPGA developers the opportunity to sell hardware accelerations to all of AWS users: Ramping on AWS MP services, capabilities and commercial opportunities are recommend knowledge for developers interesting in offering their AFI. 
+
+Education and research institutes can use AWS MP to distribute their research work ; having access to vast amounts of free [public data-sets](https://aws.amazon.com/public-datasets/ ) can be of value when running research hardware accelarations on AWS.
+
+Finally, AWS consulting and technology  partners can offer their services through the [AWS Partner Network](https://aws.amazon.com/ec2/instance-types/f1/partners/) to AWS users that don’t have specific FPGA development knowledge, and in order to develop FPGA accelerations in the cloud by themselves.
+  
+  
+**Q: How is  deployment FPGA in the cloud different compared to on-premises?**
+
+With AWS, FPGAs developers have a few deployment advantages:
+
+- Low entry bar: AWS FPGAs are charged on an hourly rate instead of many thousands of dollars spent on hardware/licenses and 12+ months time it takes to design/manufacture and ship a working hardware solution.
+  
+- Scalability and Elasticity: Developers can ramp up / down the number of deployed FPGAs within seconds based on offered load.
+  
+- Share: FPGA developers can share their designs easily through AWS Marketplace or APN. This is important for businesses as well as education and research use.
+  
+- AWS FPGA instances can be combined with other AWS services to create a solution pipeline or integrate an accelaration into existing customer workflows/datasets
+ 
+ 
+**Q: What is included in the FPGA HDK?**
+
+The HDK includes the following main components:
+
+1) Documentation for the Shell interface and other Custom Logic implementation guidelines, the Shell models needed for Custom Logic development, simulation models for the Shell, software for exercising.
 
 2) Custom Logic examples, a getting started guide for building your own Custom Logic, and examples for starting a Custom Logic Design.
 
@@ -34,22 +93,18 @@ The HDK includes the following major components::
 5) RTL Simulation models and RTL simulation.
 
 
-
 **Q: What is in the AWS Shell?**
 
-The AWS Shell is a piece of code provided and managed by AWS, that implements the non-differentiated development heavy lifting tasks like setting up the PCIe interface, FPGA image infrastructure, security and operational isolation, metrics and debug hooks.
+The AWS Shell is the part of the FPGA that is provided and managed by AWS: it implements the non-differentiated development and heavy lifting tasks like setting up the PCIe interface, image download, security, monitoring, metrics and debug hooks.
 
 Every FPGA deployed in AWS cloud includes an AWS shell, and the developer Custom Logic (CL) interfaces with the available AWS Shell interfaces.
+  
 
-The AWS shell includes the PCIe interface for the FPGA, and necessary FPGA management functionality.  One of the four DRAM interface controllers is included in the Shell, while the three other DRAM interface controllers is expected to be instantiated in the CL code (A design choice that was made to achieve optimal utilization of FPGA resources from placement perspective)
-
+**Q: What is an Amazon FPGA Image (AFI)?**
 
+It is the compiled FPGA code that is loaded into an FPGA in AWS for performing the Custom Logic (CL) function created by the developer. AFIs are maintained by AWS according and associated with the AWS account that created them. The AFI includes the CustomLogic (CL) and AWS FPGA Shell. An AFI ID is used to reference a particular AFI from an F1 instance.
 
-**Q: What is an AFI?**
-
-An AFI stands for Amazon FPGA Image. It is the compiled FPGA code that is loaded into an FPGA in AWS for performing the Custom Logic (CL) function created by the developer. AFIs are maintained by AWS according to the AWS account that created them. An AFI ID is used to reference a particular AFI from an F1 instance.
-
-The developer can create multiple AFIs at no extra cost, up to a defined limited (typically 100 AFIs per AWS account). An AFI can be loaded into as many FPGAs as needed. 
+The developer can create multiple AFIs at no extra cost, up to a defined limited (typically 100 AFIs per region per AWS account). An AFI can be loaded into as many FPGAs as needed. 
 
 
 
@@ -61,18 +116,23 @@ The AFI process starts by creating Custom Logic (CL) code that conforms to the [
 
 **Q: Can I bring my own bitstream for loading on an F1 FPGA?**
 
-No. There is no mechanism for loading a bitstream directly onto the FPGAs of an F1 instance. All Custom Logic bitstreams are loaded onto the FPGA by the `aws ec2 fpga-local-load-image` API. Developers create an AFI by creating a Vivado Design Checkpoint (DCP) and submitting that DCP to AWS using `aws ec2 create-fpga-image` API. AWS creates the final AFI and bitstream from that DCP and returns an AFI ID for referencing that AFI.
-
+No. There is no mechanism for loading a bitstream directly onto the FPGAs of an F1 instance. All Custom Logic are loaded onto the FPGA by calling `$ fpga-local-load-image` tool provides by [AWS FPGA SDK](https://github.com/aws/aws-fpga/sdk). 
 
+Developers create an AFI by creating a Vivado Design Checkpoint (DCP) and submitting that DCP to AWS using `aws ec2 create-fpga-image` API. AWS creates the final AFI and bitstream from that DCP and returns an AFI ID for referencing that AFI.
+  
 
 **Q: Can I generate my bitstream on my own desktop/server (not on AWS cloud)?**
 
-Yes, on-premises tools can be used to develop the Design Checkpoint needed for creating an AFI. The developer needs to download HDK can be downloaded from GitHub and run on any local machine. 
+Yes, on-premises tools can be used to develop the Design Checkpoint needed for creating an AFI. The developer needs to download AWS FPGA HDK from GitHub and run on any local machine. 
 
 If a developer uses local tools and license, please check the [supported versions of Vivado](./hdk/supported_vivado_versions.txt) for the exact Xilinx Vivado tool version supported by the HDK.  Developers have access to Xilinx Vivado running in the AWS by using the [FPGA Developer AMI on AWS Marketplace](https://aws.amazon.com/marketplace/pp/B06VVYBLZZ)
+  
 
+**Q: Is there a “best practice” system template? **
 
-
+AWS prefers not to limit developers to a specific template in terms of how we advise to use AWS FPGAs. A good overview of these interfaces can be found [here](https://github.com/aws/aws-fpga/blob/master/hdk/docs/Programmer_View.md)
+  
+  
 **Q: Do I need to get a Xilinx license to generate an AFI?**
 
 If the developer uses the [FPGA Developer AMI on AWS Marketplace](https://aws.amazon.com/marketplace/pp/B06VVYBLZZ), Xilinx licenses for simulation, encryption, SDAccel and Design Checkpoint generation are included. 
@@ -81,33 +141,30 @@ If the developer want to run using other methods or on a local machine, the deve
 Developers that choose to not use the developer AMI in AWS EC2, need to have Xilinx license 'EF-VIVADO-SDX-VU9P-OP' installed on premise.  For more help, please refer to [On-premise licensing help](./hdk/docs/on_premise_licensing_help.md)
 
 
-
 **Q: Does AWS provide actual FPGA boards for on-premises development?**
 
 No. AWS supports a cloud-only development model and provides the necessary elements for doing 100% cloud development including Virtual JTAG (Vivado ChipScope), Virtual LEDs and Virtual DIP-switch. No development board is provided for on-premises development.
-
-
+  
 
 **Q: Do I need to design for a specific power envelope?**
 
-Yes, the design scripts provided in the HDK include checks for power consumption that exceeds the allocated power for the Custom Logic (CL) region. Developers do not need to include design considerations for DRAM, Shell, or Thermal. AWS includes the design considerations for
-those as part of providing the power envelop for the CL region.
+Yes, the design scripts provided in the HDK include checks for power consumption that exceeds the allocated power for the Custom Logic (CL) region. Developers do not need to include design considerations for DRAM, Shell, or Thermal. AWS includes the design considerations for those as part of providing the power envelop for the CL region.
 
 
 
 **Q: What IP blocks are provided in the HDK?**
 
-The HDK includes IP for the Shell and DRAM interface controllers. Inside the Shell there is a PCIe interface, DMA Engine, and one DRAM interface controller. These blocks are only accessible via the AXI interfaces defined by the Shell-Custom Logic interface. The HDK provides additional IP blocks for the other DRAM interfaces, enabling up to 3 additional DRAM interfaces instantiated by the developer in the Custom Logic region. 
+The HDK includes IP for AWS Shell and DRAM interface controllers. Inside the Shell, there is a PCIe interface, DMA Engine, and one DRAM interface controller. These blocks are only accessible via the AXI interfaces defined by the Shell-Custom Logic interface. The HDK provides additional IP blocks for the other DRAM interfaces, enabling up to 3 additional DRAM interfaces instantiated by the developer in the Custom Logic region. 
 
-* Note that future versions of the HDK will include IP for the FPGA Link interface.
+ **Note** *that future versions of the HDK will include IP for the FPGA Link interface.*
 
 
 
 **Q: Can I use other IP blocks from Xilinx or other 3rd parties?**
 
 Yes. Developers are free to use any IP blocks within the Custom Logic region. Those can be 3rd party IP or IP available in the Vivado IP catalog.
 
-* Note that AWS supports only the IP blocks contained in the HDK.
+**Note** *that AWS supports only the IP blocks contained in the HDK.*