Develop cl (#302)

* New Chimera/GitHub flow changes.

Change-Id: Ib0d7a08a155ddce0e681ac8b57f163cfead1d450

* Lock_design and notify updates.

Change-Id: Id323042eec430bc7c3ca1cf8608db22c04d56b13

* dram build script updates.

Change-Id: I574e1895e3caae0eb2ec882c9a685e1257ba5f38

* fixes in cl_dram_dma for latest Vivado version

Change-Id: I8d35913c9fa41b3b3b37c0b2d7ad5e09584fdec0

* new SHELL vesrion 0x04151701

Change-Id: I5cb9c504624decba0bfef23dd90bb37b4ec8140d

* cl_dram_dma scripts update

Change-Id: Ia440454f74de97c344cf028fa74ea6be01024c3c

* fixed sh_bfm

Change-Id: Ieb454f9cfb00b879681b38f857fd334778100d51

* cl_hello_world updates for 0415 shell

Change-Id: I558bdbd007974c691ce44f4d7497ee8d9aaed5d6

* new sh_ddr dir

Change-Id: Ib7a60cbe7a7c451a5cccbdd921ce8b2d3f5911be

* cl_dram_dma sims working

Change-Id: I6234c7668795740bfe8e8b32b399d87f81f74b66

* cl_dram_dma tcl update

Change-Id: Id2e7dcac776e5518fe82be04f1266d9f7c4ba1cc

* Various updates

Change-Id: Ia48f97379fa05a53c300551de4151aa0da27ddd8

* cl_hello_world sims

Change-Id: I8a8e31a49279238ed2fddc7faba4d94ca6132904

* using vivado instead of sdx

Change-Id: Ie01db4962ab605c0bbe508b2213b6e5eff7327ab

* Build script minor updates; New v2 keyfile.

Change-Id: Ic9b80be20e34ac5d7b0eee63d7028bbb6da99680

* fixing cl_hello_world test compile

Change-Id: If7a8ae47f58a5861719741fc40c15e7288f4f26c

* removed prohibit_tr.tcl file

Change-Id: I2de7911217a1072df4712b7d015920af9df68439

* Updating supress messages.

Change-Id: If440175d749a95bb8a82aba2cb612154e796ef51

* FIxed AXSIZE on xdma transfers

Change-Id: Id1976d404d167f9d68fd43ba0e30c656ef0b5c8f

Author: AWScccabra

hdk/cl/examples/cl_dram_dma/build/scripts/create_dcp_from_cl.tcl

@@ -50,7 +50,8 @@ set place 1
 set place_options    ""
 set place_directive  "Explore"
 #Prohbit sites to avoid congestion if utilization is low enough
-set place_preHookTcl "./prohibit_tr.tcl"
+
+set place_preHookTcl ""
 
 set phys_opt 1
 set phys_options    ""

hdk/cl/examples/cl_hello_world/build/scripts/create_dcp_from_cl.tcl

@@ -107,6 +107,13 @@ set_msg_config -id {Synth 8-350}        -suppress
 set_msg_config -id {Synth 8-3848}       -suppress
 set_msg_config -id {Synth 8-3917}       -suppress
 set_msg_config -id {Timing 38-436}      -suppress
+set_msg_config -id {Synth 8-6014}       -suppress
+set_msg_config -id {Constraints 18-952} -suppress
+set_msg_config -id {DRC CKLD-2}         -suppress
+set_msg_config -id {DRC REQP-1853}      -suppress
+set_msg_config -id {Route 35-456}       -suppress
+set_msg_config -id {Route 35-455}       -suppress
+set_msg_config -id {Route 35-459}       -suppress
 
 puts "AWS FPGA: ([clock format [clock seconds] -format %T]) Calling the encrypt.tcl.";
 

hdk/common/verif/models/sh_bfm/sh_bfm.sv

@@ -1914,6 +1914,7 @@ module sh_bfm #(
                   end
                 end
                 axi_cmd.id   = chan;
+                axi_cmd.size = 6;
                 sh_cl_wr_cmds.push_back(axi_cmd);
 
                 // loop to do multiple data beats
@@ -2040,6 +2041,7 @@ module sh_bfm #(
                   end
                   axi_cmd.id   = chan;
                 end
+                axi_cmd.size = 6;
                 sh_cl_rd_cmds.push_back(axi_cmd);
                 for(int i = 0; i <= axi_cmd.len; i++) begin
                   data_dop.buffer = dop.buffer;