RAM64.hdl

// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/a/RAM64.hdl

/**
 * Memory of 64 registers, each 16 bit-wide. Out holds the value
 * stored at the memory location specified by address. If load==1, then 
 * the in value is loaded into the memory location specified by address 
 * (the loaded value will be emitted to out from the next time step onward).
 */

CHIP RAM64 {
    IN in[16], load, address[6];
    OUT out[16];

    PARTS:
    // Put your code here:

DMux8Way(in=load, sel=address[3..5], a=a, b=b, c=c, d=d, e=e, f=f, g=g, h=h);

RAM8(in=in, load=a, address=address[0..2], out=ram1);
RAM8(in=in, load=b, address=address[0..2], out=ram2);
RAM8(in=in, load=c, address=address[0..2], out=ram3);
RAM8(in=in, load=d, address=address[0..2], out=ram4);
RAM8(in=in, load=e, address=address[0..2], out=ram5);
RAM8(in=in, load=f, address=address[0..2], out=ram6);
RAM8(in=in, load=g, address=address[0..2], out=ram7);
RAM8(in=in, load=h, address=address[0..2], out=ram8);

Mux8Way16(a=ram1, b=ram2, c=ram3, d=ram4, e=ram5, f=ram6, g=ram7, h=ram8, sel=address[3..5], out=out);




}