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[SOL] Invert indexes for dynamic stack frames in v3 (#178)
* Invert indexes for dynamic stack frames in v3 * Fix rebase conflicts
1 parent f4898aa commit cc8f60e

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8 files changed

+87
-12
lines changed

8 files changed

+87
-12
lines changed

llvm/lib/Target/SBF/SBFFrameLowering.cpp

Lines changed: 10 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -21,20 +21,26 @@ bool SBFFrameLowering::hasFPImpl(const MachineFunction &MF) const { return true;
2121

2222
void SBFFrameLowering::emitPrologue(MachineFunction &MF,
2323
MachineBasicBlock &MBB) const {
24-
if (!MF.getSubtarget<SBFSubtarget>().getHasDynamicFrames()) {
24+
const SBFSubtarget& Subtarget = MF.getSubtarget<SBFSubtarget>();
25+
if (!Subtarget.getHasDynamicFrames()) {
2526
return;
2627
}
28+
2729
MachineBasicBlock::iterator MBBI = MBB.begin();
2830
MachineFrameInfo &MFI = MF.getFrameInfo();
2931
int NumBytes = (int)MFI.getStackSize();
30-
if ((NumBytes || MF.getSubtarget<SBFSubtarget>().getHasStaticSyscalls()) &&
31-
MBBI != MBB.end()) {
32+
33+
if (NumBytes && MBBI != MBB.end()) {
3234
DebugLoc Dl = MBBI->getDebugLoc();
3335
const SBFInstrInfo &TII =
3436
*static_cast<const SBFInstrInfo *>(MF.getSubtarget().getInstrInfo());
37+
38+
if (Subtarget.isDynamicFramesV1())
39+
NumBytes = -NumBytes;
40+
3541
BuildMI(MBB, MBBI, Dl, TII.get(SBF::ADD_ri), SBF::R10)
3642
.addReg(SBF::R10)
37-
.addImm(-NumBytes);
43+
.addImm(NumBytes);
3844
}
3945
}
4046

llvm/lib/Target/SBF/SBFRegisterInfo.cpp

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -167,13 +167,20 @@ int SBFRegisterInfo::resolveInternalFrameIndex(
167167

168168
if (SubTarget.getHasDynamicFrames() &&
169169
SBFFuncInfo->containsFrameIndex(FI)) {
170-
return -Offset;
170+
if (SubTarget.isDynamicFramesV1())
171+
return -Offset;
172+
173+
return Offset;
171174
}
172175

173176
Offset += Imm.value_or(0);
174177

175178
if (SubTarget.getHasDynamicFrames()) {
176-
return static_cast<int>(StackSize) + Offset;
179+
Offset += static_cast<int>(StackSize);
180+
if (SubTarget.isDynamicFramesV1())
181+
return Offset;
182+
183+
return -Offset;
177184
}
178185

179186
return Offset;

llvm/lib/Target/SBF/SBFSubtarget.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -57,6 +57,7 @@ void SBFSubtarget::initializeEnvironment(const Triple &TT) {
5757
HasStaticSyscalls = false;
5858
IsAbiV2 = false;
5959
HasJmp32 = false;
60+
HasDynamicFramesV3 = false;
6061
}
6162

6263
void SBFSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {

llvm/lib/Target/SBF/SBFSubtarget.h

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -92,6 +92,9 @@ class SBFSubtarget : public SBFGenSubtargetInfo {
9292
// JMP32 support depends on ALU32 being enabled
9393
bool HasJmp32;
9494

95+
// Whether we are dealing with dynamic stack frames in SBPFv3
96+
bool HasDynamicFramesV3;
97+
9598
std::unique_ptr<CallLowering> CallLoweringInfo;
9699
std::unique_ptr<InstructionSelector> InstSelector;
97100
std::unique_ptr<LegalizerInfo> Legalizer;
@@ -110,7 +113,12 @@ class SBFSubtarget : public SBFGenSubtargetInfo {
110113
// subtarget options. Definition of function is auto generated by tblgen.
111114
void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS);
112115
bool getHasAlu32() const { return HasAlu32; }
113-
bool getHasDynamicFrames() const { return HasDynamicFrames; }
116+
bool getHasDynamicFrames() const {
117+
return HasDynamicFrames || HasDynamicFramesV3;
118+
}
119+
bool isDynamicFramesV1() const {
120+
return HasDynamicFrames;
121+
}
114122
bool getUseDwarfRIS() const { return UseDwarfRIS; }
115123
bool getDisableNeg() const { return DisableNeg; }
116124
bool getReverseSubImm() const { return ReverseSubImm; }

llvm/lib/Target/SBF/SBFTargetFeatures.td

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -55,6 +55,9 @@ def FeatureAbiV2 : SubtargetFeature<"abi-v2", "IsAbiV2",
5555
def FeatureJmp32 : SubtargetFeature<"jmp-32", "HasJmp32", "true",
5656
"Enable the JMP32 instruction class">;
5757

58+
def FeatureDynamicFramesV3 : SubtargetFeature<"dynamic-frames-v3", "HasDynamicFramesV3", "true",
59+
"Enable dynamic frames in SBPFv3">;
60+
5861
class Proc<string Name, list<SubtargetFeature> Features>
5962
: Processor<Name, NoItineraries, Features>;
6063

llvm/test/CodeGen/SBF/dynamic_stack_frame_add_not_sub.ll renamed to llvm/test/CodeGen/SBF/dynamic_stack_frame_add_and_sub.ll

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,5 @@
11
; RUN: llc < %s -march=sbf -mattr=+dynamic-frames | FileCheck %s
2+
; RUN: llc -O3 -march=sbf -mattr=+dynamic-frames-v3,+alu32 < %s | FileCheck --check-prefix=CHECK-V3 %s
23
;
34
; Source:
45
; int test_func(int * vec, int idx) {
@@ -13,7 +14,7 @@
1314
define i32 @test_func(ptr noundef %vec, i32 noundef %idx) #0 {
1415
; CHECK-LABEL: test_func:
1516
; CHECK: add64 r10, -128
16-
; CHECK-NOT: add64 r10, 128
17+
; CHECK-V3: add64 r10, 128
1718
entry:
1819
%vec.addr = alloca ptr, align 8
1920
%idx.addr = alloca i512, align 4

llvm/test/CodeGen/SBF/many_args_new_conv.ll

Lines changed: 41 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
; RUN: llc -O2 -march=sbf -mcpu=v1 < %s | FileCheck %s
22
; RUN: llc -O2 -mtriple=sbpfv1-solana-solana < %s | FileCheck %s
33
; RUN: llc -O2 -march=sbf -mcpu=v1 -mattr=+mem-encoding < %s | FileCheck %s
4-
; RUN: llc -O3 -march=sbf -mcpu=v3 < %s | FileCheck --check-prefix=CHECK-V3 %s
4+
; RUN: llc -O3 -march=sbf -mattr=+dynamic-frames-v3 < %s | FileCheck --check-prefix=CHECK-V3 %s
55

66
; Function Attrs: nounwind uwtable
77
define i32 @caller_no_alloca(i32 %a, i32 %b, i32 %c) #0 {
@@ -10,15 +10,20 @@ entry:
1010

1111
; No changes to the stack pointer
1212
; CHECK-NOT: add64 r10
13-
; Add zero to stack pointer from V3 onwards
14-
; CHECK-V3: add64 r10, 0
1513

1614
; Saving arguments on the stack
1715
; CHECK: stdw [r10 - 40], 60
1816
; CHECK: stdw [r10 - 32], 55
1917
; CHECK: stdw [r10 - 24], 50
2018
; CHECK: stdw [r10 - 16], 4
2119
; CHECK: stdw [r10 - 8], 3
20+
21+
; CHECK-V3: stdw [r10 + 40], 60
22+
; CHECK-V3: stdw [r10 + 32], 55
23+
; CHECK-V3: stdw [r10 + 24], 50
24+
; CHECK-V3: stdw [r10 + 16], 4
25+
; CHECK-V3: stdw [r10 + 8], 3
26+
2227
; CHECK: mov64 r4, 1
2328
; CHECK: mov64 r5, 2
2429
; CHECK: call callee_alloca
@@ -45,6 +50,18 @@ define i32 @caller_alloca(i32 %a, i32 %b, i32 %c) #0 {
4550
; CHECK: stdw [r10 - 16], 4
4651
; Offset in the callee: frame_size - 8
4752
; CHECK: stdw [r10 - 8], 3
53+
54+
; Offset in the callee: frame_size - 40
55+
; CHECK-V3: stdw [r10 + 40], 60
56+
; Offset in the callee: frame_size - 32
57+
; CHECK-V3: stdw [r10 + 32], 55
58+
; Offset in the callee: frame_size - 24
59+
; CHECK-V3: stdw [r10 + 24], 50
60+
; Offset in the callee: frame_size - 16
61+
; CHECK-V3: stdw [r10 + 16], 4
62+
; Offset in the callee: frame_size - 8
63+
; CHECK-V3: stdw [r10 + 8], 3
64+
4865
; CHECK: mov64 r4, 1
4966
; CHECK: mov64 r5, 2
5067
; CHECK: call callee_no_alloca
@@ -63,6 +80,8 @@ entry:
6380
define i32 @callee_alloca(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %p, i32 %y, i32 %a1, i32 %a2) #1 {
6481
; CHECK-LABEL: callee_alloca
6582
; CHECK: add64 r10, -128
83+
; CHECK-V3: add64 r10, 128
84+
6685
; Loading arguments
6786
; CHECK: ldxw r2, [r10 + 120]
6887
; CHECK: ldxw r2, [r10 + 112]
@@ -71,6 +90,16 @@ define i32 @callee_alloca(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %p
7190
; CHECK: ldxw r2, [r10 + 88]
7291
; Loading allocated i32
7392
; CHECK: ldxw r0, [r10 + 24]
93+
94+
; CHECK-V3: ldxw r2, [r10 - 120]
95+
; CHECK-V3: ldxw r2, [r10 - 112]
96+
; CHECK-V3: ldxw r2, [r10 - 104]
97+
; CHECK-V3: ldxw r2, [r10 - 96]
98+
; CHECK-V3: ldxw r2, [r10 - 88]
99+
; Loading allocated i32
100+
; CHECK-V3: ldxw r0, [r10 - 24]
101+
102+
74103
; CHECK-NOT: add64 r10, 128
75104

76105
entry:
@@ -93,13 +122,22 @@ entry:
93122
define i32 @callee_no_alloca(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %p, i32 %y, i32 %a1, i32 %a2) #1 {
94123
; CHECK-LABEL: callee_no_alloca
95124
; CHECK: add64 r10, -64
125+
; CHECK-V3: add64 r10, 64
126+
96127
; Loading arguments
97128
; CHECK: ldxw r1, [r10 + 56]
98129
; CHECK: ldxw r1, [r10 + 48]
99130
; CHECK: ldxw r1, [r10 + 40]
100131
; CHECK: ldxw r1, [r10 + 32]
101132
; CHECK: ldxw r1, [r10 + 24]
102133

134+
; Loading arguments
135+
; CHECK-V3: ldxw r1, [r10 - 56]
136+
; CHECK-V3: ldxw r1, [r10 - 48]
137+
; CHECK-V3: ldxw r1, [r10 - 40]
138+
; CHECK-V3: ldxw r1, [r10 - 32]
139+
; CHECK-V3: ldxw r1, [r10 - 24]
140+
103141
; CHECK-NOT: add64 r10, 64
104142
entry:
105143
%g = add i32 %a, %b

llvm/test/CodeGen/SBF/many_args_value_size.ll

Lines changed: 12 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
; RUN: llc -march=sbf -mcpu=v2 < %s | FileCheck %s
22
; RUN: llc -mtriple=sbpfv2-solana-solana < %s | FileCheck %s
3+
; RUN: llc -O3 -march=sbf -mattr=+dynamic-frames-v3,+alu32 < %s | FileCheck --check-prefix=CHECK-V3 %s
34

45
define i64 @test_func(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e) {
56
start:
@@ -10,6 +11,11 @@ start:
1011
; CHECK: stw [r10 - 12], 65516
1112
; CHECK: stw [r10 - 4], 5
1213

14+
; CHECK-V3: stdw [r10 + 32], 5400
15+
; CHECK-V3: stw [r10 + 20], 300
16+
; CHECK-V3: stw [r10 + 12], 65516
17+
; CHECK-V3: stw [r10 + 4], 5
18+
1319
%res = call i64 @func(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i8 5, i16 -20, i32 300, i64 5400)
1420
ret i64 %res
1521
}
@@ -18,26 +24,31 @@ define i64 @func(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i8 %b8, i16 %b16, i32 %
1824
start:
1925
; CHECK-LABEL: func:
2026
; CHECK: add64 r10, -64
27+
; CHECK-V3: add64 r10, 64
2128
%a1 = add i64 %a, %b
2229
%a2 = sub i64 %a1, %c
2330
%a3 = mul i64 %a2, %d
2431
%a4 = add i64 %a3, %e
2532

2633
; -64 + 32 = -32, so this is 5400 in %a5
2734
; CHECK: ldxdw r4, [r10 + 32]
35+
; CHECK-V3: ldxdw r4, [r10 - 32]
2836

2937
; -64 + 60 = -4, so this is 5 in %b8
3038
; CHECK: ldxb w4, [r10 + 60]
39+
; CHECK-V3: ldxb w4, [r10 - 60]
3140
%c0 = trunc i64 %a to i8
3241
%b1 = add i8 %b8, %c0
3342

3443
; -64 + 52 = -12, so this is -20 in %b16
35-
; ldxw w1, [r10 + 52]
44+
; CHECK: ldxh w1, [r10 + 52]
45+
; CHECK-V3: ldxh w1, [r10 - 52]
3646
%c1 = trunc i64 %b to i16
3747
%b2 = add i16 %b16, %c1
3848

3949
; -64 + 44 = -20, so this is 300 in %b32
4050
; CHECK: ldxw w1, [r10 + 44]
51+
; CHECK-V3: ldxw w1, [r10 - 44]
4152
%c2 = trunc i64 %c to i32
4253
%b3 = add i32 %b32, %c2
4354

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