Calculator-Didactic/calc_didactic.ucf at master · andumy/Calculator-Didactic · GitHub

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#PACE: Start of Constraints generated by PACE

#PACE: Start of PACE I/O Pin Assignments
NET "CLK_50mhz" IOSTANDARD = LVCMOS33;
NET "CLK_50mhz" LOC = C9;
NET "VGA_blue" DRIVE = 8;
NET "VGA_blue" SLEW = FAST;
NET "VGA_blue" IOSTANDARD = LVTTL;
NET "VGA_blue" LOC = G15;
NET "VGA_green" DRIVE = 8;
NET "VGA_green" SLEW = FAST;
NET "VGA_green" IOSTANDARD = LVTTL;
NET "VGA_green" LOC = H15;
NET "VGA_hsync" IOSTANDARD = LVTTL;
NET "VGA_hsync" DRIVE = 8;
NET "VGA_hsync" SLEW = FAST;
NET "VGA_hsync" LOC = F15;
NET "VGA_red" IOSTANDARD = LVTTL;
NET "VGA_red" SLEW = FAST;
NET "VGA_red" DRIVE = 8;
NET "VGA_red" LOC = H14;
NET "VGA_vsync" IOSTANDARD = LVTTL;
NET "VGA_vsync" DRIVE = 8;
NET "VGA_vsync" SLEW = FAST;
NET "VGA_vsync" LOC = F14;
#PACE: Start of PACE Area Constraints

#PACE: Start of PACE Prohibit Constraints

#PACE: End of Constraints generated by PACE


NET "BTN_clk_btn" LOC = K17;
NET "BTN_rst" LOC = V4;


NET "BTN_clk_btn" IOSTANDARD = LVTTL;
NET "BTN_rst" IOSTANDARD = LVTTL;
NET "BTN_clk_btn" PULLDOWN;
NET "BTN_rst" PULLDOWN;

# PlanAhead Generated physical constraints

NET "BTN_clk_div0" LOC = L13;
NET "BTN_clk_div1" LOC = L14;
NET "BTN_clk_div2" LOC = H18;
NET "BTN_clk_div3" LOC = N17;

# PlanAhead Generated IO constraints

NET "BTN_clk_div0" IOSTANDARD = LVTTL;
NET "BTN_clk_div1" IOSTANDARD = LVTTL;
NET "BTN_clk_div2" IOSTANDARD = LVTTL;
NET "BTN_clk_div3" IOSTANDARD = LVTTL;
NET "BTN_clk_div0" PULLDOWN;
NET "BTN_clk_div1" PULLDOWN;
NET "BTN_clk_div2" PULLDOWN;
NET "BTN_clk_div3" PULLDOWN;

NET "BTN_next"  LOC = H13 | IOSTANDARD = LVTTL    | PULLDOWN;
NET "BTN_prev"  LOC = D18 | IOSTANDARD = LVTTL    | PULLDOWN;
NET "BTN_rot_A" LOC = K18 | IOSTANDARD = LVTTL    | PULLUP;
NET "BTN_rot_B" LOC = G18 | IOSTANDARD = LVTTL    | PULLUP;

NET "LCD_db7"   LOC = M15 | IOSTANDARD = LVCMOS33 | DRIVE = 4;
NET "LCD_db6"   LOC = P17 | IOSTANDARD = LVCMOS33 | DRIVE = 4;
NET "LCD_db5"   LOC = R16 | IOSTANDARD = LVCMOS33 | DRIVE = 4;
NET "LCD_db4"   LOC = R15 | IOSTANDARD = LVCMOS33 | DRIVE = 4;
NET "LCD_e"     LOC = M18 | IOSTANDARD = LVCMOS33 | DRIVE = 4;
NET "LCD_rs"    LOC = L18 | IOSTANDARD = LVCMOS33 | DRIVE = 4;
NET "LCD_rw"    LOC = L17 | IOSTANDARD = LVCMOS33 | DRIVE = 4;
NET "SF_ce0"    LOC = D16 | IOSTANDARD = LVCMOS33 | DRIVE = 4;